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authorAndreas Hansson <andreas.hansson@arm.com>2016-01-11 05:52:20 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2016-01-11 05:52:20 -0500
commit12eb0343784f52994110df7e7fce4a0b639a6ec3 (patch)
tree12ff1c51b8051bb7e7d889eed499bee0dcd4cd1e /src/arch/arm
parent7661f1c2bf2b45603264076fabce2eb42373cd18 (diff)
downloadgem5-12eb0343784f52994110df7e7fce4a0b639a6ec3.tar.xz
scons: Enable -Wextra by default
Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial.
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/faults.hh2
-rw-r--r--src/arch/arm/utility.cc2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index ef87ee145..02d2e81f5 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -58,7 +58,7 @@
namespace ArmISA
{
-typedef const Addr FaultOffset;
+typedef Addr FaultOffset;
class ArmFault : public FaultBase
{
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index bedd4a0b0..a4ae849c1 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -209,7 +209,7 @@ getMPIDR(ArmSystem *arm_sys, ThreadContext *tc)
// We deliberately extend both the Cluster ID and CPU ID fields to allow
// for simulation of larger systems
assert((0 <= tc->cpuId()) && (tc->cpuId() < 256));
- assert((0 <= tc->socketId()) && (tc->socketId() < 65536));
+ assert(tc->socketId() < 65536);
if (arm_sys->multiThread) {
return 0x80000000 | // multiprocessor extensions available
tc->contextId();