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authorAndreas Sandberg <andreas.sandberg@arm.com>2015-07-07 09:51:03 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2015-07-07 09:51:03 +0100
commit76cd4393c08b83fa9006ee7bce1fb62457e053c1 (patch)
treef1d2d109f77a8cf31365143d6eb127b610d924f5 /src/arch/arm
parentd7a56ee524c976a41fa40e5382a28462de799645 (diff)
downloadgem5-76cd4393c08b83fa9006ee7bce1fb62457e053c1.tar.xz
sim: Refactor the serialization base class
Objects that are can be serialized are supposed to inherit from the Serializable class. This class is meant to provide a unified API for such objects. However, so far it has mainly been used by SimObjects due to some fundamental design limitations. This changeset redesigns to the serialization interface to make it more generic and hide the underlying checkpoint storage. Specifically: * Add a set of APIs to serialize into a subsection of the current object. Previously, objects that needed this functionality would use ad-hoc solutions using nameOut() and section name generation. In the new world, an object that implements the interface has the methods serializeSection() and unserializeSection() that serialize into a named /subsection/ of the current object. Calling serialize() serializes an object into the current section. * Move the name() method from Serializable to SimObject as it is no longer needed for serialization. The fully qualified section name is generated by the main serialization code on the fly as objects serialize sub-objects. * Add a scoped ScopedCheckpointSection helper class. Some objects need to serialize data structures, that are not deriving from Serializable, into subsections. Previously, this was done using nameOut() and manual section name generation. To simplify this, this changeset introduces a ScopedCheckpointSection() helper class. When this class is instantiated, it adds a new /subsection/ and subsequent serialization calls during the lifetime of this helper class happen inside this section (or a subsection in case of nested sections). * The serialize() call is now const which prevents accidental state manipulation during serialization. Objects that rely on modifying state can use the serializeOld() call instead. The default implementation simply calls serialize(). Note: The old-style calls need to be explicitly called using the serializeOld()/serializeSectionOld() style APIs. These are used by default when serializing SimObjects. * Both the input and output checkpoints now use their own named types. This hides underlying checkpoint implementation from objects that need checkpointing and makes it easier to change the underlying checkpoint storage code.
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/interrupts.hh4
-rw-r--r--src/arch/arm/isa.hh4
-rw-r--r--src/arch/arm/kvm/gic.cc4
-rw-r--r--src/arch/arm/kvm/gic.hh2
-rw-r--r--src/arch/arm/pagetable.hh14
-rw-r--r--src/arch/arm/pmu.cc21
-rw-r--r--src/arch/arm/pmu.hh10
-rw-r--r--src/arch/arm/tlb.cc15
-rw-r--r--src/arch/arm/tlb.hh4
-rw-r--r--src/arch/arm/types.hh8
10 files changed, 40 insertions, 46 deletions
diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index f93ea5c8f..d5d2dac34 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -272,14 +272,14 @@ class Interrupts : public SimObject
}
void
- serialize(std::ostream &os)
+ serialize(CheckpointOut &cp) const
{
SERIALIZE_ARRAY(interrupts, NumInterruptTypes);
SERIALIZE_SCALAR(intStatus);
}
void
- unserialize(Checkpoint *cp, const std::string &section)
+ unserialize(CheckpointIn &cp)
{
UNSERIALIZE_ARRAY(interrupts, NumInterruptTypes);
UNSERIALIZE_SCALAR(intStatus);
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 11f25de6d..a07017c17 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -402,7 +402,7 @@ namespace ArmISA
return flat_idx;
}
- void serialize(std::ostream &os)
+ void serialize(CheckpointOut &cp) const
{
DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
SERIALIZE_ARRAY(miscRegs, NumMiscRegs);
@@ -413,7 +413,7 @@ namespace ArmISA
SERIALIZE_SCALAR(haveLargeAsid64);
SERIALIZE_SCALAR(physAddrRange64);
}
- void unserialize(Checkpoint *cp, const std::string &section)
+ void unserialize(CheckpointIn &cp)
{
DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs);
diff --git a/src/arch/arm/kvm/gic.cc b/src/arch/arm/kvm/gic.cc
index 9010d8df8..a0e0e7899 100644
--- a/src/arch/arm/kvm/gic.cc
+++ b/src/arch/arm/kvm/gic.cc
@@ -66,13 +66,13 @@ KvmGic::~KvmGic()
}
void
-KvmGic::serialize(std::ostream &os)
+KvmGic::serialize(CheckpointOut &cp) const
{
panic("Checkpointing unsupported\n");
}
void
-KvmGic::unserialize(Checkpoint *cp, const std::string &sec)
+KvmGic::unserialize(CheckpointIn &cp)
{
panic("Checkpointing unsupported\n");
}
diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh
index 3b196d108..4a115c87c 100644
--- a/src/arch/arm/kvm/gic.hh
+++ b/src/arch/arm/kvm/gic.hh
@@ -79,7 +79,7 @@ class KvmGic : public BaseGic
void startup() M5_ATTR_OVERRIDE { verifyMemoryMode(); }
void drainResume() M5_ATTR_OVERRIDE { verifyMemoryMode(); }
- void serialize(std::ostream &os) M5_ATTR_OVERRIDE;
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
void unserialize(Checkpoint *cp, const std::string &sec) M5_ATTR_OVERRIDE;
public: // PioDevice
diff --git a/src/arch/arm/pagetable.hh b/src/arch/arm/pagetable.hh
index c1956cf09..3de993d27 100644
--- a/src/arch/arm/pagetable.hh
+++ b/src/arch/arm/pagetable.hh
@@ -61,12 +61,12 @@ struct VAddr
// ITB/DTB page table entry
struct PTE
{
- void serialize(std::ostream &os)
+ void serialize(CheckpointOut &cp) const
{
panic("Need to implement PTE serialization\n");
}
- void unserialize(Checkpoint *cp, const std::string &section)
+ void unserialize(CheckpointIn &cp)
{
panic("Need to implement PTE serialization\n");
}
@@ -83,7 +83,7 @@ enum LookupLevel {
};
// ITB/DTB table entry
-struct TlbEntry
+struct TlbEntry : public Serializable
{
public:
enum class MemoryType : std::uint8_t {
@@ -284,7 +284,7 @@ struct TlbEntry
}
void
- serialize(std::ostream &os)
+ serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
{
SERIALIZE_SCALAR(longDescFormat);
SERIALIZE_SCALAR(pfn);
@@ -311,10 +311,10 @@ struct TlbEntry
SERIALIZE_SCALAR(ap);
SERIALIZE_SCALAR(hap);
uint8_t domain_ = static_cast<uint8_t>(domain);
- paramOut(os, "domain", domain_);
+ paramOut(cp, "domain", domain_);
}
void
- unserialize(Checkpoint *cp, const std::string &section)
+ unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
{
UNSERIALIZE_SCALAR(longDescFormat);
UNSERIALIZE_SCALAR(pfn);
@@ -341,7 +341,7 @@ struct TlbEntry
UNSERIALIZE_SCALAR(ap);
UNSERIALIZE_SCALAR(hap);
uint8_t domain_;
- paramIn(cp, section, "domain", domain_);
+ paramIn(cp, "domain", domain_);
domain = static_cast<DomainType>(domain_);
}
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index d20f4e27d..6ea053e55 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -513,7 +513,7 @@ PMU::raiseInterrupt()
}
void
-PMU::serialize(std::ostream &os)
+PMU::serialize(CheckpointOut &cp) const
{
DPRINTF(Checkpoint, "Serializing Arm PMU\n");
@@ -525,17 +525,14 @@ PMU::serialize(std::ostream &os)
SERIALIZE_SCALAR(reg_pmceid);
SERIALIZE_SCALAR(clock_remainder);
- for (size_t i = 0; i < counters.size(); ++i) {
- nameOut(os, csprintf("%s.counters.%i", name(), i));
- counters[i].serialize(os);
- }
+ for (size_t i = 0; i < counters.size(); ++i)
+ counters[i].serializeSection(cp, csprintf("counters.%i", i));
- nameOut(os, csprintf("%s.cycleCounter", name()));
- cycleCounter.serialize(os);
+ cycleCounter.serializeSection(cp, "cycleCounter");
}
void
-PMU::unserialize(Checkpoint *cp, const std::string &section)
+PMU::unserialize(CheckpointIn &cp)
{
DPRINTF(Checkpoint, "Unserializing Arm PMU\n");
@@ -548,13 +545,13 @@ PMU::unserialize(Checkpoint *cp, const std::string &section)
UNSERIALIZE_SCALAR(clock_remainder);
for (size_t i = 0; i < counters.size(); ++i)
- counters[i].unserialize(cp, csprintf("%s.counters.%i", section, i));
+ counters[i].unserializeSection(cp, csprintf("counters.%i", i));
- cycleCounter.unserialize(cp, csprintf("%s.cycleCounter", section));
+ cycleCounter.unserializeSection(cp, "cycleCounter");
}
void
-PMU::CounterState::serialize(std::ostream &os)
+PMU::CounterState::serialize(CheckpointOut &cp) const
{
SERIALIZE_SCALAR(eventId);
SERIALIZE_SCALAR(value);
@@ -563,7 +560,7 @@ PMU::CounterState::serialize(std::ostream &os)
}
void
-PMU::CounterState::unserialize(Checkpoint *cp, const std::string &section)
+PMU::CounterState::unserialize(CheckpointIn &cp)
{
UNSERIALIZE_SCALAR(eventId);
UNSERIALIZE_SCALAR(value);
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index 94f8c2397..80be965a4 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -96,8 +96,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
void addEventProbe(unsigned int id, SimObject *obj, const char *name);
public: // SimObject and related interfaces
- void serialize(std::ostream &os) M5_ATTR_OVERRIDE;
- void unserialize(Checkpoint *cp, const std::string &sec) M5_ATTR_OVERRIDE;
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
void drainResume() M5_ATTR_OVERRIDE;
@@ -321,7 +321,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
};
/** State of a counter within the PMU. */
- struct CounterState {
+ struct CounterState : public Serializable {
CounterState()
: eventId(0), filter(0), value(0), enabled(false),
overflow64(false) {
@@ -329,8 +329,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
listeners.reserve(4);
}
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
/**
* Add an event count to the counter and check for overflow.
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 9a706a166..11075f02c 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -383,7 +383,7 @@ TLB::takeOverFrom(BaseTLB *_otlb)
}
void
-TLB::serialize(ostream &os)
+TLB::serialize(CheckpointOut &cp) const
{
DPRINTF(Checkpoint, "Serializing Arm TLB\n");
@@ -394,14 +394,12 @@ TLB::serialize(ostream &os)
int num_entries = size;
SERIALIZE_SCALAR(num_entries);
- for(int i = 0; i < size; i++){
- nameOut(os, csprintf("%s.TlbEntry%d", name(), i));
- table[i].serialize(os);
- }
+ for(int i = 0; i < size; i++)
+ table[i].serializeSection(cp, csprintf("TlbEntry%d", i));
}
void
-TLB::unserialize(Checkpoint *cp, const string &section)
+TLB::unserialize(CheckpointIn &cp)
{
DPRINTF(Checkpoint, "Unserializing Arm TLB\n");
@@ -412,9 +410,8 @@ TLB::unserialize(Checkpoint *cp, const string &section)
int num_entries;
UNSERIALIZE_SCALAR(num_entries);
- for(int i = 0; i < min(size, num_entries); i++){
- table[i].unserialize(cp, csprintf("%s.TlbEntry%d", section, i));
- }
+ for(int i = 0; i < min(size, num_entries); i++)
+ table[i].unserializeSection(cp, csprintf("TlbEntry%d", i));
}
void
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index 5d418ef17..28b99a8e0 100644
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -287,8 +287,8 @@ class TLB : public BaseTLB
void drainResume();
// Checkpointing
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
+ void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
void regStats();
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index eff8f13fb..c54bfb5f4 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -483,9 +483,9 @@ namespace ArmISA
}
void
- serialize(std::ostream &os)
+ serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE
{
- Base::serialize(os);
+ Base::serialize(cp);
SERIALIZE_SCALAR(flags);
SERIALIZE_SCALAR(_size);
SERIALIZE_SCALAR(nextFlags);
@@ -494,9 +494,9 @@ namespace ArmISA
}
void
- unserialize(Checkpoint *cp, const std::string &section)
+ unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE
{
- Base::unserialize(cp, section);
+ Base::unserialize(cp);
UNSERIALIZE_SCALAR(flags);
UNSERIALIZE_SCALAR(_size);
UNSERIALIZE_SCALAR(nextFlags);