style: fix missing spaces in control statements

Result of running 'hg m5style --skip-all --fix-control -a'.

5 files changed, 18 insertions, 18 deletions

diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc
index 5578354d9..154039a77 100644
--- a/src/arch/arm/insts/macromem.cc
+++ b/src/arch/arm/insts/macromem.cc
@@ -145,7 +145,7 @@ MacroMemOp::MacroMemOp(const char *mnem, ExtMachInst machInst,
             // 32-bit memory operation
             // Find register for operation
             unsigned reg_idx;
-            while(!bits(regs, reg)) reg++;
+            while (!bits(regs, reg)) reg++;
             replaceBits(regs, reg, 0);
             reg_idx = force_user ? intRegInMode(MODE_USER, reg) : reg;
 
@@ -1149,7 +1149,7 @@ VldMultOp64::VldMultOp64(const char *mnem, ExtMachInst machInst,
         TLB::AllowUnaligned;
 
     int i = 0;
-    for(; i < numMemMicroops - 1; ++i) {
+    for (; i < numMemMicroops - 1; ++i) {
         microOps[uopIdx++] = new MicroNeonLoad64(
             machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
             baseIsSP, 16 /* accSize */, eSize);
@@ -1231,7 +1231,7 @@ VstMultOp64::VstMultOp64(const char *mnem, ExtMachInst machInst,
     microOps = new StaticInstPtr[numMicroops];
     unsigned uopIdx = 0;
 
-    for(int i = 0; i < numMarshalMicroops; ++i) {
+    for (int i = 0; i < numMarshalMicroops; ++i) {
         switch (numRegs) {
             case 1: microOps[uopIdx++] = new MicroIntNeon64_1Reg(
                         machInst, vx + (RegIndex) (2 * i), vd, eSize, dataSize,
@@ -1257,7 +1257,7 @@ VstMultOp64::VstMultOp64(const char *mnem, ExtMachInst machInst,
         TLB::AllowUnaligned;
 
     int i = 0;
-    for(; i < numMemMicroops - 1; ++i) {
+    for (; i < numMemMicroops - 1; ++i) {
         microOps[uopIdx++] = new MicroNeonStore64(
             machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
             baseIsSP, 16 /* accSize */, eSize);
@@ -1347,7 +1347,7 @@ VldSingleOp64::VldSingleOp64(const char *mnem, ExtMachInst machInst,
         }
     }
 
-    for(int i = 0; i < numMarshalMicroops; ++i) {
+    for (int i = 0; i < numMarshalMicroops; ++i) {
         microOps[uopIdx++] = new MicroUnpackNeon64(
             machInst, vd + (RegIndex) (2 * i), vx, eSize, dataSize,
             numStructElems, index, i /* step */, replicate);
@@ -1394,7 +1394,7 @@ VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
     microOps = new StaticInstPtr[numMicroops];
     unsigned uopIdx = 0;
 
-    for(int i = 0; i < numMarshalMicroops; ++i) {
+    for (int i = 0; i < numMarshalMicroops; ++i) {
         microOps[uopIdx++] = new MicroPackNeon64(
             machInst, vx + (RegIndex) (2 * i), vd, eSize, dataSize,
             numStructElems, index, i /* step */, replicate);
@@ -1404,7 +1404,7 @@ VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
         TLB::AllowUnaligned;
 
     int i = 0;
-    for(; i < numMemMicroops - 1; ++i) {
+    for (; i < numMemMicroops - 1; ++i) {
         microOps[uopIdx++] = new MicroNeonStore64(
             machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
             baseIsSP, 16 /* accsize */, eSize);
diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh
index f17f90973..f28ab9e1f 100644
--- a/src/arch/arm/insts/vfp.hh
+++ b/src/arch/arm/insts/vfp.hh
@@ -551,7 +551,7 @@ fpMulX(T a, T b)
     bool zero1 = (std::fpclassify(a) == FP_ZERO);
     bool zero2 = (std::fpclassify(b) == FP_ZERO);
     if ((inf1 && zero2) || (zero1 && inf2)) {
-        if(sign1 ^ sign2)
+        if (sign1 ^ sign2)
             return (T)(-2.0);
         else
             return (T)(2.0);
@@ -685,7 +685,7 @@ fpRSqrts(T a, T b)
     }
     aXb = a*b;
     fpClassAxB = std::fpclassify(aXb);
-    if(fpClassAxB == FP_SUBNORMAL) {
+    if (fpClassAxB == FP_SUBNORMAL) {
        feraiseexcept(FeUnderflow);
        return 1.5;
     }
@@ -707,7 +707,7 @@ fpRecps(T a, T b)
     }
     aXb = a*b;
     fpClassAxB = std::fpclassify(aXb);
-    if(fpClassAxB == FP_SUBNORMAL) {
+    if (fpClassAxB == FP_SUBNORMAL) {
        feraiseexcept(FeUnderflow);
        return 2.0;
     }
@@ -729,7 +729,7 @@ fpRSqrtsS(float a, float b)
     }
     aXb = a*b;
     fpClassAxB = std::fpclassify(aXb);
-    if(fpClassAxB == FP_SUBNORMAL) {
+    if (fpClassAxB == FP_SUBNORMAL) {
        feraiseexcept(FeUnderflow);
        return 1.5;
     }
@@ -750,7 +750,7 @@ fpRecpsS(float a, float b)
     }
     aXb = a*b;
     fpClassAxB = std::fpclassify(aXb);
-    if(fpClassAxB == FP_SUBNORMAL) {
+    if (fpClassAxB == FP_SUBNORMAL) {
        feraiseexcept(FeUnderflow);
        return 2.0;
     }
diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index e3f12cb94..69d6f8c2e 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -399,7 +399,7 @@ ArmKvmCPU::decodeCoProcReg(uint64_t id) const
           default:
             return NUM_MISCREGS;
         }
-    } else if(is_reg64) {
+    } else if (is_reg64) {
         return NUM_MISCREGS;
     } else {
         warn("Unhandled register length, register (0x%x) ignored.\n");
diff --git a/src/arch/arm/linux/system.cc b/src/arch/arm/linux/system.cc
index fc13e8cf5..4b3135bfc 100644
--- a/src/arch/arm/linux/system.cc
+++ b/src/arch/arm/linux/system.cc
@@ -83,7 +83,7 @@ LinuxArmSystem::LinuxArmSystem(Params *p)
     // newer kernels use __loop_udelay and __loop_const_udelay symbols
     uDelaySkipEvent = addKernelFuncEvent<UDelayEvent>(
         "__loop_udelay", "__udelay", 1000, 0);
-    if(!uDelaySkipEvent)
+    if (!uDelaySkipEvent)
         uDelaySkipEvent = addKernelFuncEventOrPanic<UDelayEvent>(
          "__udelay", "__udelay", 1000, 0);
 
@@ -91,7 +91,7 @@ LinuxArmSystem::LinuxArmSystem(Params *p)
     // time. Constant comes from code.
     constUDelaySkipEvent = addKernelFuncEvent<UDelayEvent>(
         "__loop_const_udelay", "__const_udelay", 1000, 107374);
-    if(!constUDelaySkipEvent)
+    if (!constUDelaySkipEvent)
         constUDelaySkipEvent = addKernelFuncEventOrPanic<UDelayEvent>(
          "__const_udelay", "__const_udelay", 1000, 107374);
 
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 688c0d46b..bdcb91fac 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -148,7 +148,7 @@ TLB::lookup(Addr va, uint16_t asn, uint8_t vmid, bool hyp, bool secure,
             // than rangeMRU
             if (x > rangeMRU && !functional) {
                 TlbEntry tmp_entry = table[x];
-                for(int i = x; i > 0; i--)
+                for (int i = x; i > 0; i--)
                     table[i] = table[i - 1];
                 table[0] = tmp_entry;
                 retval = &table[0];
@@ -394,7 +394,7 @@ TLB::serialize(CheckpointOut &cp) const
 
     int num_entries = size;
     SERIALIZE_SCALAR(num_entries);
-    for(int i = 0; i < size; i++)
+    for (int i = 0; i < size; i++)
         table[i].serializeSection(cp, csprintf("TlbEntry%d", i));
 }
 
@@ -410,7 +410,7 @@ TLB::unserialize(CheckpointIn &cp)
 
     int num_entries;
     UNSERIALIZE_SCALAR(num_entries);
-    for(int i = 0; i < min(size, num_entries); i++)
+    for (int i = 0; i < min(size, num_entries); i++)
         table[i].unserializeSection(cp, csprintf("TlbEntry%d", i));
 }