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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-24 11:45:30 -0500 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-24 11:45:30 -0500 |
commit | 9e3c8de30bafe33f35e4b9e82fb49418941f8cb7 (patch) | |
tree | 016c65f8060c49b31d3fd3c064b97ae09279d689 /src/arch/arm | |
parent | 1031b824b975cec999c37cabc8c05c485a4ae5ca (diff) | |
download | gem5-9e3c8de30bafe33f35e4b9e82fb49418941f8cb7.tar.xz |
MEM: Make port proxies use references rather than pointers
This patch is adding a clearer design intent to all objects that would
not be complete without a port proxy by making the proxies members
rathen than dynamically allocated. In essence, if NULL would not be a
valid value for the proxy, then we avoid using a pointer to make this
clear.
The same approach is used for the methods using these proxies, such as
loadSections, that now use references rather than pointers to better
reflect the fact that NULL would not be an acceptable value (in fact
the code would break and that is how this patch started out).
Overall the concept of "using a reference to express unconditional
composition where a NULL pointer is never valid" could be done on a
much broader scale throughout the code base, but for now it is only
done in the locations affected by the proxies.
Diffstat (limited to 'src/arch/arm')
-rw-r--r-- | src/arch/arm/linux/process.cc | 10 | ||||
-rw-r--r-- | src/arch/arm/linux/system.cc | 2 | ||||
-rw-r--r-- | src/arch/arm/process.cc | 14 | ||||
-rw-r--r-- | src/arch/arm/stacktrace.cc | 14 | ||||
-rw-r--r-- | src/arch/arm/system.cc | 2 | ||||
-rw-r--r-- | src/arch/arm/utility.cc | 6 | ||||
-rw-r--r-- | src/arch/arm/vtophys.cc | 6 |
7 files changed, 26 insertions, 28 deletions
diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc index 1074b0362..fcf00c84e 100644 --- a/src/arch/arm/linux/process.cc +++ b/src/arch/arm/linux/process.cc @@ -452,7 +452,7 @@ setTLSFunc(SyscallDesc *desc, int callnum, LiveProcess *process, int index = 0; uint32_t tlsPtr = process->getSyscallArg(tc, index); - tc->getMemProxy()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0, + tc->getMemProxy().writeBlob(ArmLinuxProcess::commPage + 0x0ff0, (uint8_t *)&tlsPtr, sizeof(tlsPtr)); tc->setMiscReg(MISCREG_TPIDRURO,tlsPtr); return 0; @@ -512,7 +512,7 @@ ArmLinuxProcess::initState() // Fill this page with swi -1 so we'll no if we land in it somewhere. for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) { - tc->getMemProxy()->writeBlob(commPage + addr, + tc->getMemProxy().writeBlob(commPage + addr, swiNeg1, sizeof(swiNeg1)); } @@ -521,7 +521,7 @@ ArmLinuxProcess::initState() 0x5f, 0xf0, 0x7f, 0xf5, // dmb 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fa0, memory_barrier, + tc->getMemProxy().writeBlob(commPage + 0x0fa0, memory_barrier, sizeof(memory_barrier)); uint8_t cmpxchg[] = @@ -535,7 +535,7 @@ ArmLinuxProcess::initState() 0x5f, 0xf0, 0x7f, 0xf5, // dmb 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg)); + tc->getMemProxy().writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg)); uint8_t get_tls[] = { @@ -543,7 +543,7 @@ ArmLinuxProcess::initState() 0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3 0x0e, 0xf0, 0xa0, 0xe1 // return }; - tc->getMemProxy()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls)); + tc->getMemProxy().writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls)); } ArmISA::IntReg diff --git a/src/arch/arm/linux/system.cc b/src/arch/arm/linux/system.cc index a764edaca..a2d0c156c 100644 --- a/src/arch/arm/linux/system.cc +++ b/src/arch/arm/linux/system.cc @@ -114,7 +114,7 @@ LinuxArmSystem::initState() DPRINTF(Loader, "Boot atags was %d bytes in total\n", size << 2); DDUMP(Loader, boot_data, size << 2); - physProxy->writeBlob(ParamsList, boot_data, size << 2); + physProxy.writeBlob(ParamsList, boot_data, size << 2); #ifndef NDEBUG kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic"); diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index c149f5409..37999c905 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -284,17 +284,17 @@ ArmLiveProcess::argsInit(int intSize, int pageSize) //Write out the sentry void * uint32_t sentry_NULL = 0; - initVirtMem->writeBlob(sentry_base, + initVirtMem.writeBlob(sentry_base, (uint8_t*)&sentry_NULL, sentry_size); //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { if (auxv[i].a_type == M5_AT_PLATFORM) { auxv[i].a_val = platform_base; - initVirtMem->writeString(platform_base, platform.c_str()); + initVirtMem.writeString(platform_base, platform.c_str()); } else if (auxv[i].a_type == M5_AT_EXECFN) { auxv[i].a_val = aux_data_base; - initVirtMem->writeString(aux_data_base, filename.c_str()); + initVirtMem.writeString(aux_data_base, filename.c_str()); } else if (auxv[i].a_type == M5_AT_RANDOM) { auxv[i].a_val = aux_random_base; // Just leave the value 0, we don't want randomness @@ -304,20 +304,20 @@ ArmLiveProcess::argsInit(int intSize, int pageSize) //Copy the aux stuff for(int x = 0; x < auxv.size(); x++) { - initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, + initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, (uint8_t*)&(auxv[x].a_type), intSize); - initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, + initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, (uint8_t*)&(auxv[x].a_val), intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; - initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), + initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(), (uint8_t*)&zero, 2 * intSize); copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); - initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); + initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); ThreadContext *tc = system->getThreadContext(contextIds[0]); //Set the stack pointer register diff --git a/src/arch/arm/stacktrace.cc b/src/arch/arm/stacktrace.cc index 69d0f354c..99ebcd7c5 100644 --- a/src/arch/arm/stacktrace.cc +++ b/src/arch/arm/stacktrace.cc @@ -48,29 +48,27 @@ namespace ArmISA { Addr addr = 0; - FSTranslatingPortProxy* vp; - - vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr)) panic("thread info not compiled into kernel\n"); - thread_info_size = vp->readGtoH<int32_t>(addr); + thread_info_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr)) panic("thread info not compiled into kernel\n"); - task_struct_size = vp->readGtoH<int32_t>(addr); + task_struct_size = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr)) panic("thread info not compiled into kernel\n"); - task_off = vp->readGtoH<int32_t>(addr); + task_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr)) panic("thread info not compiled into kernel\n"); - pid_off = vp->readGtoH<int32_t>(addr); + pid_off = vp.readGtoH<int32_t>(addr); if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr)) panic("thread info not compiled into kernel\n"); - name_off = vp->readGtoH<int32_t>(addr); + name_off = vp.readGtoH<int32_t>(addr); } Addr diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc index ca5bfc471..c26be6026 100644 --- a/src/arch/arm/system.cc +++ b/src/arch/arm/system.cc @@ -85,7 +85,7 @@ ArmSystem::initState() { 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 }; - physProxy->writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); + physProxy.writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); inform("Using bootloader at address %#x\n", bootldr->entryPoint()); } diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 0527e135f..0a1cefce7 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -91,18 +91,18 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp) } } else { Addr sp = tc->readIntReg(StackPointerReg); - FSTranslatingPortProxy* vp = tc->getVirtProxy(); + FSTranslatingPortProxy &vp = tc->getVirtProxy(); uint64_t arg; if (size == sizeof(uint64_t)) { // If the argument is even it must be aligned if ((number % 2) != 0) number++; - arg = vp->read<uint64_t>(sp + + arg = vp.read<uint64_t>(sp + (number-NumArgumentRegs) * sizeof(uint32_t)); // since two 32 bit args == 1 64 bit arg, increment number number++; } else { - arg = vp->read<uint32_t>(sp + + arg = vp.read<uint32_t>(sp + (number-NumArgumentRegs) * sizeof(uint32_t)); } return arg; diff --git a/src/arch/arm/vtophys.cc b/src/arch/arm/vtophys.cc index 45e6f1849..7c26962cb 100644 --- a/src/arch/arm/vtophys.cc +++ b/src/arch/arm/vtophys.cc @@ -101,11 +101,11 @@ ArmISA::vtophys(ThreadContext *tc, Addr addr) N = 0; } - PortProxy* port = tc->getPhysProxy(); + PortProxy &port = tc->getPhysProxy(); Addr l1desc_addr = mbits(ttbr, 31, 14-N) | (bits(addr,31-N,20) << 2); TableWalker::L1Descriptor l1desc; - l1desc.data = port->read<uint32_t>(l1desc_addr); + l1desc.data = port.read<uint32_t>(l1desc_addr); if (l1desc.type() == TableWalker::L1Descriptor::Ignore || l1desc.type() == TableWalker::L1Descriptor::Reserved) { warn("Unable to translate virtual address: %#x\n", addr); @@ -117,7 +117,7 @@ ArmISA::vtophys(ThreadContext *tc, Addr addr) // Didn't find it at the first level, try againt Addr l2desc_addr = l1desc.l2Addr() | (bits(addr, 19, 12) << 2); TableWalker::L2Descriptor l2desc; - l2desc.data = port->read<uint32_t>(l2desc_addr); + l2desc.data = port.read<uint32_t>(l2desc_addr); if (l2desc.invalid()) { warn("Unable to translate virtual address: %#x\n", addr); |