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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
commit | a480ba00b96f4c2e872f5a01bfa1782500f1066e (patch) | |
tree | 9d99a96528f37eb601f6e7268c3a359d84f02d57 /src/arch/arm | |
parent | 0cb180ea0dcece9157ad71b4136d557c2dbcf209 (diff) | |
download | gem5-a480ba00b96f4c2e872f5a01bfa1782500f1066e.tar.xz |
Registers: Eliminate the ISA defined integer register file.
Diffstat (limited to 'src/arch/arm')
-rw-r--r-- | src/arch/arm/regfile/int_regfile.hh | 41 | ||||
-rw-r--r-- | src/arch/arm/regfile/regfile.cc | 2 | ||||
-rw-r--r-- | src/arch/arm/regfile/regfile.hh | 23 |
3 files changed, 3 insertions, 63 deletions
diff --git a/src/arch/arm/regfile/int_regfile.hh b/src/arch/arm/regfile/int_regfile.hh index b22129f33..1f2715a6b 100644 --- a/src/arch/arm/regfile/int_regfile.hh +++ b/src/arch/arm/regfile/int_regfile.hh @@ -43,11 +43,6 @@ class ThreadContext; namespace ArmISA { - static inline std::string getIntRegName(RegIndex) - { - return ""; - } - enum MiscIntRegNums { zero_reg = NumIntArchRegs, addr_reg, @@ -77,42 +72,6 @@ namespace ArmISA r14_abt }; - class IntRegFile - { - protected: - IntReg regs[NumIntRegs]; - - public: - IntReg readReg(int intReg) - { - DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", - intReg, regs[intReg]); - return regs[intReg]; - } - - void clear() - { - bzero(regs, sizeof(regs)); - } - - Fault setReg(int intReg, const IntReg &val) - { - DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", intReg, val); - regs[intReg] = val; - return NoFault; - } - - void serialize(std::ostream &os) - { - SERIALIZE_ARRAY(regs, NumIntRegs); - } - - void unserialize(Checkpoint *cp, const std::string §ion) - { - UNSERIALIZE_ARRAY(regs, NumIntRegs); - } - }; - } // namespace ArmISA #endif diff --git a/src/arch/arm/regfile/regfile.cc b/src/arch/arm/regfile/regfile.cc index 4ab3c771f..49ffb4f28 100644 --- a/src/arch/arm/regfile/regfile.cc +++ b/src/arch/arm/regfile/regfile.cc @@ -57,7 +57,6 @@ MiscRegFile::copyMiscRegs(ThreadContext *tc) void RegFile::serialize(EventManager *em, ostream &os) { - intRegFile.serialize(os); SERIALIZE_SCALAR(npc); SERIALIZE_SCALAR(nnpc); } @@ -65,7 +64,6 @@ RegFile::serialize(EventManager *em, ostream &os) void RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion) { - intRegFile.unserialize(cp, section); UNSERIALIZE_SCALAR(npc); UNSERIALIZE_SCALAR(nnpc); } diff --git a/src/arch/arm/regfile/regfile.hh b/src/arch/arm/regfile/regfile.hh index 35830eabf..05f9197c3 100644 --- a/src/arch/arm/regfile/regfile.hh +++ b/src/arch/arm/regfile/regfile.hh @@ -67,25 +67,10 @@ namespace ArmISA class RegFile { - protected: - IntRegFile intRegFile; // (signed) integer register file - public: void clear() - { - intRegFile.clear(); - } - - IntReg readIntReg(int intReg) - { - return intRegFile.readReg(intReg); - } - - void setIntReg(int intReg, const IntReg &val) - { - intRegFile.setReg(intReg, val); - } + {} protected: Addr pc; // program counter @@ -95,14 +80,12 @@ namespace ArmISA public: Addr readPC() { - return intRegFile.readReg(PCReg); - //return pc; + return pc; } void setPC(Addr val) { - intRegFile.setReg(PCReg, val); - //pc = val; + pc = val; } Addr readNextPC() |