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authorGabe Black <gblack@eecs.umich.edu>2010-08-23 16:14:20 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-08-23 16:14:20 -0700
commit943c1714803bb87d3b05b2516701dfb792996805 (patch)
treecfefb1ef949355bc237c9b6e37117b9b059e0116 /src/arch/arm
parent9581562e653f6df810e40c076bc97d50daccf302 (diff)
downloadgem5-943c1714803bb87d3b05b2516701dfb792996805.tar.xz
ISA: Get rid of old, unused utility functions cluttering up the ISAs.
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/utility.hh19
1 files changed, 0 insertions, 19 deletions
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 6ee2fb325..076468e0d 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -96,25 +96,6 @@ namespace ArmISA {
template <class TC>
void zeroRegisters(TC *tc);
- // Instruction address compression hooks
- static inline Addr realPCToFetchPC(const Addr &addr) {
- return addr;
- }
-
- static inline Addr fetchPCToRealPC(const Addr &addr) {
- return addr;
- }
-
- // the size of "fetched" instructions
- static inline size_t fetchInstSize() {
- return sizeof(MachInst);
- }
-
- static inline MachInst makeRegisterCopy(int dest, int src) {
- panic("makeRegisterCopy not implemented");
- return 0;
- }
-
inline void startupCPU(ThreadContext *tc, int cpuId)
{
tc->activate(0);