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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-16 14:25:20 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-20 14:23:19 +0000
commit4ccb1ea710dcdcf179726448596b96c8e44f743a (patch)
treedab9fc942f1114010297f8f708b5ec52855d9b83 /src/arch/arm
parentbefa49ffb777fadf3e07f0f70d29346158f00b13 (diff)
downloadgem5-4ccb1ea710dcdcf179726448596b96c8e44f743a.tar.xz
arch-arm: Overload currEL helper with CPSR argument
Change-Id: I1edabc61637ecb9d30bca34b5dbcf1de12b35fe0 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20250 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/utility.hh6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index ded5aa36c..3a1506114 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -156,6 +156,12 @@ currEL(ThreadContext *tc)
return opModeToEL(currOpMode(tc));
}
+inline ExceptionLevel
+currEL(CPSR cpsr)
+{
+ return opModeToEL((OperatingMode) (uint8_t)cpsr.mode);
+}
+
/**
* This function checks whether selected EL provided as an argument
* is using the AArch32 ISA. This information might be unavailable