arch: cpu: Rename *FloatRegBits* to *FloatReg*.

Now that there's no plain FloatReg, there's no reason to distinguish
FloatRegBits with a special suffix since it's the only way to read or
write FP registers.

Change-Id: I3a60168c1d4302aed55223ea8e37b421f21efded
Reviewed-on: https://gem5-review.googlesource.com/c/14460
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

5 files changed, 22 insertions, 22 deletions

diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index 69d6f8c2e..4d6b9a1b3 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -697,8 +697,8 @@ ArmKvmCPU::updateKvmStateVFP(uint64_t id, bool show_warnings)
         const unsigned idx_hi(idx_base + 1);
         const unsigned idx_lo(idx_base + 0);
         uint64_t value(
-            ((uint64_t)tc->readFloatRegBitsFlat(idx_hi) << 32) |
-            tc->readFloatRegBitsFlat(idx_lo));
+            ((uint64_t)tc->readFloatRegFlat(idx_hi) << 32) |
+            tc->readFloatRegFlat(idx_lo));
 
         setOneReg(id, value);
     } else if (REG_IS_VFP_CTRL(id)) {
@@ -839,8 +839,8 @@ ArmKvmCPU::updateTCStateVFP(uint64_t id, bool show_warnings)
         const unsigned idx_lo(idx_base + 0);
         uint64_t value(getOneRegU64(id));
 
-        tc->setFloatRegBitsFlat(idx_hi, (value >> 32) & 0xFFFFFFFF);
-        tc->setFloatRegBitsFlat(idx_lo, value & 0xFFFFFFFF);
+        tc->setFloatRegFlat(idx_hi, (value >> 32) & 0xFFFFFFFF);
+        tc->setFloatRegFlat(idx_lo, value & 0xFFFFFFFF);
     } else if (REG_IS_VFP_CTRL(id)) {
         MiscRegIndex idx(decodeVFPCtrlReg(id));
         if (idx == NUM_MISCREGS) {
diff --git a/src/arch/arm/kvm/armv8_cpu.cc b/src/arch/arm/kvm/armv8_cpu.cc
index bfd447a19..3757e2602 100644
--- a/src/arch/arm/kvm/armv8_cpu.cc
+++ b/src/arch/arm/kvm/armv8_cpu.cc
@@ -252,7 +252,7 @@ ArmV8KvmCPU::updateKvmState()
         const RegIndex reg_base(i * FP_REGS_PER_VFP_REG);
         KvmFPReg reg;
         for (int j = 0; j < FP_REGS_PER_VFP_REG; j++)
-            reg.s[j].i = tc->readFloatRegBits(reg_base + j);
+            reg.s[j].i = tc->readFloatReg(reg_base + j);
 
         setOneReg(kvmFPReg(i), reg.data);
         DPRINTF(KvmContext, "  Q%i: %s\n", i, getAndFormatOneReg(kvmFPReg(i)));
@@ -326,7 +326,7 @@ ArmV8KvmCPU::updateThreadContext()
         DPRINTF(KvmContext, "  Q%i: %s\n", i, getAndFormatOneReg(kvmFPReg(i)));
         getOneReg(kvmFPReg(i), reg.data);
         for (int j = 0; j < FP_REGS_PER_VFP_REG; j++)
-            tc->setFloatRegBits(reg_base + j, reg.s[j].i);
+            tc->setFloatReg(reg_base + j, reg.s[j].i);
     }
 
     for (const auto &ri : getSysRegMap()) {
diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc
index 67bbb1493..860bb1b0b 100644
--- a/src/arch/arm/tracers/tarmac_parser.cc
+++ b/src/arch/arm/tracers/tarmac_parser.cc
@@ -647,35 +647,35 @@ TarmacParserRecord::TarmacParserRecordEvent::process()
             break;
           case REG_S:
             if (instRecord.isetstate == ISET_A64)
-                value_lo = thread->readFloatRegBits(it->index * 4);
+                value_lo = thread->readFloatReg(it->index * 4);
             else
-                value_lo = thread->readFloatRegBits(it->index);
+                value_lo = thread->readFloatReg(it->index);
             break;
           case REG_D:
             if (instRecord.isetstate == ISET_A64)
-                value_lo = thread->readFloatRegBits(it->index * 4) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 4 + 1) <<
+                value_lo = thread->readFloatReg(it->index * 4) |
+                    (uint64_t) thread->readFloatReg(it->index * 4 + 1) <<
                     32;
             else
-                value_lo = thread->readFloatRegBits(it->index * 2) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 2 + 1) <<
+                value_lo = thread->readFloatReg(it->index * 2) |
+                    (uint64_t) thread->readFloatReg(it->index * 2 + 1) <<
                     32;
             break;
           case REG_Q:
             check_value_hi = true;
             if (instRecord.isetstate == ISET_A64) {
-                value_lo = thread->readFloatRegBits(it->index * 4) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 4 + 1) <<
+                value_lo = thread->readFloatReg(it->index * 4) |
+                    (uint64_t) thread->readFloatReg(it->index * 4 + 1) <<
                     32;
-                value_hi = thread->readFloatRegBits(it->index * 4 + 2) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 4 + 3) <<
+                value_hi = thread->readFloatReg(it->index * 4 + 2) |
+                    (uint64_t) thread->readFloatReg(it->index * 4 + 3) <<
                     32;
             } else {
-                value_lo = thread->readFloatRegBits(it->index * 2) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 2 + 1) <<
+                value_lo = thread->readFloatReg(it->index * 2) |
+                    (uint64_t) thread->readFloatReg(it->index * 2 + 1) <<
                     32;
-                value_hi = thread->readFloatRegBits(it->index * 2 + 2) |
-                    (uint64_t) thread->readFloatRegBits(it->index * 2 + 3) <<
+                value_hi = thread->readFloatReg(it->index * 2 + 2) |
+                    (uint64_t) thread->readFloatReg(it->index * 2 + 3) <<
                     32;
             }
             break;
diff --git a/src/arch/arm/tracers/tarmac_record.cc b/src/arch/arm/tracers/tarmac_record.cc
index 5dbb847e5..51fbf2c0a 100644
--- a/src/arch/arm/tracers/tarmac_record.cc
+++ b/src/arch/arm/tracers/tarmac_record.cc
@@ -235,7 +235,7 @@ TarmacTracerRecord::TraceRegEntry::updateFloat(
 
     regValid = true;
     regName  = "f" + std::to_string(regRelIdx);
-    valueLo = bitsToFloat32(thread->readFloatRegBits(regRelIdx));
+    valueLo = bitsToFloat32(thread->readFloatReg(regRelIdx));
 }
 
 void
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 11c3479c6..bee801358 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -170,7 +170,7 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
         dest->setIntRegFlat(i, src->readIntRegFlat(i));
 
     for (int i = 0; i < NumFloatRegs; i++)
-        dest->setFloatRegBitsFlat(i, src->readFloatRegBitsFlat(i));
+        dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
 
     for (int i = 0; i < NumCCRegs; i++)
         dest->setCCReg(i, src->readCCReg(i));