summaryrefslogtreecommitdiff
path: root/src/arch/arm
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2019-10-09 21:32:11 -0700
committerGabe Black <gabeblack@google.com>2019-10-25 22:42:31 +0000
commit74a66d8e6706ccaed79facc6df3999f7dee2075a (patch)
treec1b03caf8419a65240ef5451b839b5a7e2765043 /src/arch/arm
parent2b7d4bd73db443b4ca302213689a673266e856e0 (diff)
downloadgem5-74a66d8e6706ccaed79facc6df3999f7dee2075a.tar.xz
cpu: Make the ThreadContext a PCEventScope.
Both the thread and system's PCEventQueue are checked when appropriate. Change-Id: I16c371339c91a37b5641860d974e546a30e23e13 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22105 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/fastmodel/iris/thread_context.hh3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh
index 5be5e71f6..13ab29c46 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -93,6 +93,9 @@ class ThreadContext : public ::ThreadContext
const std::string &iris_path);
virtual ~ThreadContext();
+ bool schedule(PCEvent *e) override { return false; }
+ bool remove(PCEvent *e) override { return false; }
+
virtual Counter
totalInsts()
{