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author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2019-08-13 00:15:37 +0200 |
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committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2019-10-01 06:19:38 +0000 |
commit | 791d7f4f416ac7469626fcf10fab1b1aa9183cf9 (patch) | |
tree | 4ab80b143d05074b58df8a54c2b895db71f4e8a5 /src/arch/arm | |
parent | 34f850f80316201379d888bd72791be93aa5d06f (diff) | |
download | gem5-791d7f4f416ac7469626fcf10fab1b1aa9183cf9.tar.xz |
mem-cache: Fix invalid whenReady
When a writeback needs to be allocated the whenReady field of the
block is not set, and therefore its access latency calculation
uses the previously invalidated value (MaxTick), significantly
delaying execution.
This is fixed by assuming that the data write portion of a write
access is done regardless of previous writes, and that only the
tag latency is important for the critical path latency calculation.
Change-Id: I739132a2deab6eb4c46d084f4ee6dd65177873fd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20068
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/arch/arm')
0 files changed, 0 insertions, 0 deletions