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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-01-18 09:43:52 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-03-01 15:20:24 +0000 |
| commit | a7eebbfa693e3fa55c0a9c876b97adcf72662c71 (patch) | |
| tree | 73ba9f016573b0d08c0989d00368d8650393c283 /src/arch/arm | |
| parent | 5e55ecc4b5b59641c4edad3593f59ab5178e1bc2 (diff) | |
| download | gem5-a7eebbfa693e3fa55c0a9c876b97adcf72662c71.tar.xz | |
dev-arm: Set ICV_PMR_EL1-ICH_VMCR_EL2 mapping on reads
Reading ICV_PMR_EL1 should return the value the VMCR_EL2.VPMR bits
which are aliased to the register.
Change-Id: Id3e6dfb196f3726edaa3eddb244765598ed62334
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jan-Peter Larsson <jan-peter.larsson@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16545
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm')
0 files changed, 0 insertions, 0 deletions