dev-arm: Make GICv3 maintenance interrupt an ArmInterrupt

Change-Id: I88e2b72849cdf3f69026c62517303837e7d3d551
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17629
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 38fbae142..42e1cba3f 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -403,6 +403,7 @@ ISA::startup(ThreadContext *tc)
             haveGICv3CPUInterface = true;
             gicv3CpuInterface.reset(gicv3->getCPUInterface(tc->contextId()));
             gicv3CpuInterface->setISA(this);
+            gicv3CpuInterface->setThreadContext(tc);
         }
     }
 }