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authorGabe Black <gabeblack@google.com>2019-11-25 16:22:57 -0800
committerGabe Black <gabeblack@google.com>2020-01-07 23:31:51 +0000
commitf7903a2014ac06450c46dd12a4906fbd1ce82153 (patch)
treea664e18d6712523ce45e5b8131db7f1cceeb7a0a /src/arch/arm
parent80c51fc6015420eace7eea3c82d9ddc7900da08c (diff)
downloadgem5-f7903a2014ac06450c46dd12a4906fbd1ce82153.tar.xz
arch,sim: Promote the m5ops_base param to the System base class.
This mechanism is shared between ARM and x86, even if x86 has a typical address range it choses to use. By moving this to the base class, it's now possible for anybody to find out where the m5 ops are, and no ISA specific assumptions need to be made. Because the x86 address is well known, it's set in the x86 System subclass as the default. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: Ifdb9f5cd1ce38b3c4dafa7566c50f245f14cf790 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23180 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/ArmSystem.py4
-rw-r--r--src/arch/arm/system.cc3
-rw-r--r--src/arch/arm/system.hh6
3 files changed, 0 insertions, 13 deletions
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 5629ab511..0e642153b 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -93,10 +93,6 @@ class ArmSystem(System):
semihosting = Param.ArmSemihosting(NULL,
"Enable support for the Arm semihosting by settings this parameter")
- m5ops_base = Param.Addr(0,
- "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 "
- "to disable.")
-
dtb_filename = Param.String("",
"File that contains the Device Tree Blob. Don't use DTB if empty.")
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index c3c2b8d48..5c32059f4 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -75,9 +75,6 @@ ArmSystem::ArmSystem(Params *p)
_sveVL(p->sve_vl),
_haveLSE(p->have_lse),
_havePAN(p->have_pan),
- _m5opRange(p->m5ops_base ?
- RangeSize(p->m5ops_base, 0x10000) :
- AddrRange(1, 0)), // Create an empty range if disabled
semihosting(p->semihosting),
multiProc(p->multi_proc)
{
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index a9048051e..90fed14a7 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -139,12 +139,6 @@ class ArmSystem : public System
const unsigned _havePAN;
/**
- * Range for memory-mapped m5 pseudo ops. The range will be
- * invalid/empty if disabled.
- */
- const AddrRange _m5opRange;
-
- /**
* True if the Semihosting interface is enabled.
*/
ArmSemihosting *const semihosting;