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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2018-06-03 13:10:26 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-06-11 16:55:30 +0000
commit2113b21996d086dab32b9fd388efe3df241bfbd2 (patch)
tree26d944027f726dde3ec49b67538663ccc41bcad3 /src/arch/generic/locked_mem.hh
parent59505f7305cc3f3b7637233fd2d231bd7f561e80 (diff)
downloadgem5-2113b21996d086dab32b9fd388efe3df241bfbd2.tar.xz
misc: Substitute pointer to Request with aliased RequestPtr
Every usage of Request* in the code has been replaced with the RequestPtr alias. This is a preparing patch for when RequestPtr will be the typdefed to a smart pointer to Request rather then a raw pointer to Request. Change-Id: I73cbaf2d96ea9313a590cdc731a25662950cd51a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10995 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Diffstat (limited to 'src/arch/generic/locked_mem.hh')
-rw-r--r--src/arch/generic/locked_mem.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/generic/locked_mem.hh b/src/arch/generic/locked_mem.hh
index 68a4ff540..f6537995b 100644
--- a/src/arch/generic/locked_mem.hh
+++ b/src/arch/generic/locked_mem.hh
@@ -63,7 +63,7 @@ handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
template <class XC>
inline void
-handleLockedRead(XC *xc, Request *req)
+handleLockedRead(XC *xc, RequestPtr req)
{
}
@@ -76,7 +76,7 @@ handleLockedSnoopHit(XC *xc)
template <class XC>
inline bool
-handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask)
+handleLockedWrite(XC *xc, RequestPtr req, Addr cacheBlockMask)
{
return true;
}