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| author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-10-15 13:24:35 +0200 |
|---|---|---|
| committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-10-15 13:24:35 +0200 |
| commit | 5e7738467bbc928ff163afc5b94c81385cc6778e (patch) | |
| tree | ae407db632d031b2d1144347d80cb16073219081 /src/arch/generic/mmapped_ipr.cc | |
| parent | c753b273dc1d18114035c4bd5c61bd59fa9f9cfe (diff) | |
| download | gem5-5e7738467bbc928ff163afc5b94c81385cc6778e.tar.xz | |
mem: Use a flag instead of address bit 63 for generic IPRs
Using address bit 63 to identify generic IPRs caused problems on
SPARC, where IPRs are heavily used. This changeset redefines how
generic IPRs are identified. Instead of using bit 63, we now use a
separate flag (GENERIC_IPR) a memory request.
Diffstat (limited to 'src/arch/generic/mmapped_ipr.cc')
| -rw-r--r-- | src/arch/generic/mmapped_ipr.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/generic/mmapped_ipr.cc b/src/arch/generic/mmapped_ipr.cc index 3d85eea9f..1a356a5d5 100644 --- a/src/arch/generic/mmapped_ipr.cc +++ b/src/arch/generic/mmapped_ipr.cc @@ -53,7 +53,7 @@ Cycles GenericISA::handleGenericIprRead(ThreadContext *xc, Packet *pkt) { Addr va(pkt->getAddr()); - Addr cls((va & IPR_CLASS_MASK) >> IPR_CLASS_SHIFT); + Addr cls(va >> IPR_CLASS_SHIFT); switch (cls) { case IPR_CLASS_PSEUDO_INST: @@ -70,7 +70,7 @@ Cycles GenericISA::handleGenericIprWrite(ThreadContext *xc, Packet *pkt) { Addr va(pkt->getAddr()); - Addr cls((va & IPR_CLASS_MASK) >> IPR_CLASS_SHIFT); + Addr cls(va >> IPR_CLASS_SHIFT); switch (cls) { case IPR_CLASS_PSEUDO_INST: |