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| author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 14:04:41 +0800 |
| commit | 04547cc295885bfd85d8b340e147c9c3faad86ab (patch) | |
| tree | b890f8f863b58b0d88eb74f1e03dfd3c39dc3814 /src/arch/generic | |
| parent | 823d9d177fded16af07114d70b5c26caaec6aa00 (diff) | |
| download | gem5-04547cc295885bfd85d8b340e147c9c3faad86ab.tar.xz | |
invisispec-1.0 source
Diffstat (limited to 'src/arch/generic')
| -rw-r--r-- | src/arch/generic/memhelpers.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/generic/memhelpers.hh b/src/arch/generic/memhelpers.hh index 35e666b92..0a38b780c 100644 --- a/src/arch/generic/memhelpers.hh +++ b/src/arch/generic/memhelpers.hh @@ -53,6 +53,7 @@ /// Initiate a read from memory in timing mode. Note that the 'mem' /// parameter is unused; only the type of that parameter is used /// to determine the size of the access. +// XC: executeContextPtr [mengjia] template <class XC, class MemT> Fault initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr, |