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| author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 15:52:58 +0800 |
| commit | 2c99e0e616c61bb31c6902fb7d11e10042b5b210 (patch) | |
| tree | 029abeb98afd4123745f71d23ae0bb7888628053 /src/arch/generic | |
| parent | 4fdfd98230e780aeb068e3740742c7bff28fb859 (diff) | |
| download | gem5-2c99e0e616c61bb31c6902fb7d11e10042b5b210.tar.xz | |
invisispec-1.0 source
Diffstat (limited to 'src/arch/generic')
| -rw-r--r-- | src/arch/generic/memhelpers.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/generic/memhelpers.hh b/src/arch/generic/memhelpers.hh index 6fe1707a0..c77612d34 100644 --- a/src/arch/generic/memhelpers.hh +++ b/src/arch/generic/memhelpers.hh @@ -53,6 +53,7 @@ /// Initiate a read from memory in timing mode. Note that the 'mem' /// parameter is unused; only the type of that parameter is used /// to determine the size of the access. +// XC: executeContextPtr [mengjia] template <class XC, class MemT> Fault initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr, |