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authorGabe Black <gabeblack@google.com>2019-11-25 02:26:51 -0800
committerGabe Black <gabeblack@google.com>2019-12-10 23:58:14 +0000
commit390a74f59934b85d91489f8a563450d8321b602d (patch)
treec5a31b56a74e888c61f0645349b58535d2eae26a /src/arch/generic
parentcb3457ccd17a89a4df3e70d35e0254c77a0b5782 (diff)
downloadgem5-390a74f59934b85d91489f8a563450d8321b602d.tar.xz
sim,arch: Collapse the ISA specific versions of m5Syscall.
The x86 version doesn't do anything x86 specific, and so can be used generically in sim/pseudo_inst.(hh|cc) Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I46c2a7d326bd7a95daa8611888051c180e92e446 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23177 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/generic')
-rw-r--r--src/arch/generic/pseudo_inst.cc6
-rw-r--r--src/arch/generic/pseudo_inst.hh7
2 files changed, 0 insertions, 13 deletions
diff --git a/src/arch/generic/pseudo_inst.cc b/src/arch/generic/pseudo_inst.cc
index 1c83d344f..ec4cbfd52 100644
--- a/src/arch/generic/pseudo_inst.cc
+++ b/src/arch/generic/pseudo_inst.cc
@@ -37,12 +37,6 @@ class ThreadContext;
using namespace GenericISA;
void
-GenericISA::m5Syscall(ThreadContext *tc)
-{
- panic("m5Syscall not implemented for current ISA");
-}
-
-void
GenericISA::m5PageFault(ThreadContext *tc)
{
panic("m5PageFault not implemented for current ISA");
diff --git a/src/arch/generic/pseudo_inst.hh b/src/arch/generic/pseudo_inst.hh
index 001334726..58b70fe9b 100644
--- a/src/arch/generic/pseudo_inst.hh
+++ b/src/arch/generic/pseudo_inst.hh
@@ -36,13 +36,6 @@ class ThreadContext;
namespace GenericISA {
/*
- * This function is executed when the simulation is executing the syscall
- * handler in System Emulation mode.
- */
-void
-m5Syscall(ThreadContext *tc);
-
-/*
* This function is executed when the simulation is executing the pagefault
* handler in System Emulation mode.
*/