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author | Ciro Santilli <ciro.santilli@arm.com> | 2019-07-23 10:32:52 +0100 |
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committer | Ciro Santilli <ciro.santilli@arm.com> | 2019-08-21 12:17:17 +0000 |
commit | 76358df574d655f97aa223faf2b860a41271e920 (patch) | |
tree | ccbac40fad4ac3393f1ee88c31d8ec64dece74fc /src/arch/generic | |
parent | acad54cf4e01809170e343b13f302fc5b032c366 (diff) | |
download | gem5-76358df574d655f97aa223faf2b860a41271e920.tar.xz |
arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0
In src/cpu/reg_class.hh, numPinnedWrites was unset because the
constructors were not well factored out.
Change-Id: Ib2fc8d34a1adf5c48826d257a31dd24dfa64a08a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20048
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/generic')
-rw-r--r-- | src/arch/generic/types.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/generic/types.hh b/src/arch/generic/types.hh index 353112913..7f9f93f42 100644 --- a/src/arch/generic/types.hh +++ b/src/arch/generic/types.hh @@ -32,6 +32,7 @@ #define __ARCH_GENERIC_TYPES_HH__ #include <iostream> +#include <limits> #include "base/trace.hh" #include "base/types.hh" @@ -43,6 +44,9 @@ typedef uint16_t RegIndex; /** Logical vector register elem index type. */ using ElemIndex = uint16_t; +/** ElemIndex value that indicates that the register is not a vector. */ +#define ILLEGAL_ELEM_INDEX std::numeric_limits<ElemIndex>::max() + namespace GenericISA { |