mem-cache: alias to mem::getMasterPort in TLB class

TLB:getMasterPort is used to obtain the PageWalkMasterPort if present and
hides the BaseTLB::getMasterPort().

The TLB::getMasterPort() is renamed according to the expected behavior.

Change-Id: If4f61189094a706d59805cd10f4f814e5830eda8
Reviewed-on: https://gem5-review.googlesource.com/c/16648
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/src/arch/generic/tlb.hh b/src/arch/generic/tlb.hh
index 91f8f867b..7865d8abe 100644
--- a/src/arch/generic/tlb.hh
+++ b/src/arch/generic/tlb.hh
@@ -58,6 +58,7 @@ class BaseTLB : public MemObject
     {}
 
   public:
+
     enum Mode { Read, Write, Execute };
 
     class Translation
@@ -138,7 +139,7 @@ class BaseTLB : public MemObject
      *
      * @return A pointer to the walker master port or NULL if not present
      */
-    virtual BaseMasterPort* getMasterPort() { return NULL; }
+    virtual BaseMasterPort* getTableWalkerMasterPort() { return NULL; }
 
     void memInvalidate() { flushAll(); }
 };