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| author | Ali Saidi <ali.saidi@arm.com> | 2014-03-07 15:56:23 -0500 |
|---|---|---|
| committer | Ali Saidi <ali.saidi@arm.com> | 2014-03-07 15:56:23 -0500 |
| commit | bf39a475fe8c796e5b0f5b37ee2e4aca724d05f3 (patch) | |
| tree | a0a877c2ef712e0b1341834f887ee3320542f8cf /src/arch/isa_parser.py | |
| parent | f4a897d8e3e7a9fe5f409c0f15dfa5ba9438776c (diff) | |
| download | gem5-bf39a475fe8c796e5b0f5b37ee2e4aca724d05f3.tar.xz | |
mem: Wakeup sleeping CPUs without caches on LLSC
For systems without caches, the LLSC code does not get snoops for
wake-ups. We add the LLSC code in the abstract memory to do the job
for us.
Diffstat (limited to 'src/arch/isa_parser.py')
0 files changed, 0 insertions, 0 deletions