Convert Alpha (and finish converting MIPS) to new

InstObjParam interface.

src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/fp.isa:
src/arch/alpha/isa/int.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/isa/mem.isa:
src/arch/alpha/isa/pal.isa:
src/arch/mips/isa/formats/mem.isa:
src/arch/mips/isa/formats/util.isa:
    Get rid of CodeBlock calls to adapt to new InstObjParam interface.
src/arch/isa_parser.py:
    Check template code for operands (in addition to snippets).
src/cpu/o3/alpha/dyn_inst.hh:
    Add (read|write)MiscRegOperand calls to Alpha DynInst.

--HG--
extra : convert_revision : 332caf1bee19b014cb62c1ed9e793e793334c8ee

1 files changed, 3 insertions, 0 deletions

diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py
index 83cdf73bc..bd34afb11 100755
--- a/src/arch/isa_parser.py
+++ b/src/arch/isa_parser.py
@@ -1048,6 +1048,9 @@ class Template:
                     if isinstance(myDict[name], str):
                         myDict[name] = substMungedOpNames(substBitOps(myDict[name]))
                         compositeCode += (" " + myDict[name])
+
+            compositeCode += (" " + template)
+
             operands = SubOperandList(compositeCode, d.operands)
 
             myDict['op_decl'] = operands.concatAttrStrings('op_decl')