summaryrefslogtreecommitdiff
path: root/src/arch/isa_parser.py
diff options
context:
space:
mode:
authorTimothy M. Jones <tjones1@inf.ed.ac.uk>2009-10-27 09:24:39 -0700
committerTimothy M. Jones <tjones1@inf.ed.ac.uk>2009-10-27 09:24:39 -0700
commit835a55e7f347697815fc43851b2dd5a8642d21c4 (patch)
tree637768b1de6de2bc4520fad97f90194ad6d3f8d6 /src/arch/isa_parser.py
parent0fdfc82bde5b8975ee93d5da9c604ad9b99942e0 (diff)
downloadgem5-835a55e7f347697815fc43851b2dd5a8642d21c4.tar.xz
POWER: Add support for the Power ISA
This adds support for the 32-bit, big endian Power ISA. This supports both integer and floating point instructions based on the Power ISA Book I v2.06.
Diffstat (limited to 'src/arch/isa_parser.py')
-rwxr-xr-xsrc/arch/isa_parser.py10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py
index f001eff41..e3da240d2 100755
--- a/src/arch/isa_parser.py
+++ b/src/arch/isa_parser.py
@@ -1465,6 +1465,16 @@ class MemOperand(Operand):
def makeAccSize(self):
return self.size
+class PCOperand(Operand):
+ def makeConstructor(self):
+ return ''
+
+ def makeRead(self):
+ return '%s = xc->readPC();\n' % self.base_name
+
+ def makeWrite(self):
+ return 'xc->setPC(%s);\n' % self.base_name
+
class UPCOperand(Operand):
def makeConstructor(self):
return ''