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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-22 22:18:08 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-22 22:18:08 -0400 |
| commit | 475a981f6e9bdff9436ad0ecf34f83ead5a63498 (patch) | |
| tree | e27ca6e45834c47cf47992bf40f70046ada8d9f1 /src/arch/isa_specific.hh | |
| parent | 387889526430e34a7da32741d39942b7f4771bf8 (diff) | |
| download | gem5-475a981f6e9bdff9436ad0ecf34f83ead5a63498.tar.xz | |
Get rid of FastCPU model.
It doesn't compile, and if we really want this we should
start over from scratch and see if we can reuse parts from
BaseSimpleCPU (e.g., derive a FastSimpleCPU).
SConstruct:
src/arch/SConscript:
src/cpu/cpu_models.py:
Get rid of FastCPU model.
--HG--
extra : convert_revision : f3f0362f7292bf21e8e0d4d84c475be8a9789a0c
Diffstat (limited to 'src/arch/isa_specific.hh')
0 files changed, 0 insertions, 0 deletions