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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-09-12 10:23:16 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-10-03 09:05:19 +0000 |
| commit | d9fee95b715e54eafbd2c5c2a618ef92af32e3a5 (patch) | |
| tree | 7986134faa96a3cc130c84135a06afc3c2d28e6d /src/arch/micro_asm.py | |
| parent | acd148a76c29a6e647dc2cc15ef17667c61f8de6 (diff) | |
| download | gem5-d9fee95b715e54eafbd2c5c2a618ef92af32e3a5.tar.xz | |
arch-arm: Annotate CM flag in AA64 CM Instructions
DC ZVA instruction is not classified as a cache maintenance instruction,
and therefore its execution cannot cause this field to be set to 1.
Change-Id: I0f30db1e6fc629dc52293edfb2bac4cf99ee49cc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21306
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/micro_asm.py')
0 files changed, 0 insertions, 0 deletions