summaryrefslogtreecommitdiff
path: root/src/arch/mips/MipsCPU.py
diff options
context:
space:
mode:
authorNathan Binkert <nate@binkert.org>2009-09-22 15:24:16 -0700
committerNathan Binkert <nate@binkert.org>2009-09-22 15:24:16 -0700
commit9a8cb7db7e86c25a755f2e2817a0385b13e3ac32 (patch)
tree56c7b56824b967ad385b6e8890f345d18c102980 /src/arch/mips/MipsCPU.py
parent0d58d32ad51eed32e6c7f9135b901006777fbe87 (diff)
downloadgem5-9a8cb7db7e86c25a755f2e2817a0385b13e3ac32.tar.xz
python: Move more code into m5.util allow SCons to use that code.
Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
Diffstat (limited to 'src/arch/mips/MipsCPU.py')
-rw-r--r--src/arch/mips/MipsCPU.py5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/mips/MipsCPU.py b/src/arch/mips/MipsCPU.py
index 81c6bdacf..48ee4171c 100644
--- a/src/arch/mips/MipsCPU.py
+++ b/src/arch/mips/MipsCPU.py
@@ -29,12 +29,13 @@
# Authors: Jaidev Patwardhan
# Korey Sewell
-from m5.SimObject import SimObject
+from m5.defines import buildEnv
from m5.params import *
+
from BaseCPU import BaseCPU
class BaseMipsCPU(BaseCPU)
- if build_env['TARGET_ISA'] == 'mips':
+ if buildEnv['TARGET_ISA'] == 'mips':
CP0_IntCtl_IPTI = Param.Unsigned(0,"No Description")
CP0_IntCtl_IPPCI = Param.Unsigned(0,"No Description")
CP0_SrsCtl_HSS = Param.Unsigned(0,"No Description")