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authorAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:49 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:49 -0400
commit4de3205afaac1fd11876b33675aa6f49c9632764 (patch)
treeff510cdaafefa5f7e27bc0b21c6fbd447564a1d9 /src/arch/mips/MipsInterrupts.py
parent597d2aa3a661587268e3d79cf4726212329fb4af (diff)
downloadgem5-4de3205afaac1fd11876b33675aa6f49c9632764.tar.xz
config: Add a BaseSESystem builder for re-use in regressions
This patch extends the existing system builders to also include a syscall-emulation builder. This builder is deployed in all syscall-emulation regressions that do not involve Ruby, i.e. o3-timing, simple-timing and simple-atomic, as well as the multi-processor regressions o3-timing-mp, simple-timing-mp and simple-atomic-mp (the latter are only used by SPARC at this point). The values chosen for the cache sizes match those that were used in the existing config scripts (despite being on the large side). Similarly, a mem_class parameter is added to the builder base class to enable simple-atomic to use SimpleMemory and o3-timing to use the default DDR3 configuration. Due to the different order the ports are connected, the bus stats get shuffled around for the multi-processor regressions. A separate patch bumps the port indices. Besides this, all behaviour is exactly the same.
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