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authorStephan Diestelhorst <stephan.diestelhorst@arm.com>2014-06-30 13:56:06 -0400
committerStephan Diestelhorst <stephan.diestelhorst@arm.com>2014-06-30 13:56:06 -0400
commit65cea4708e2f2f2cb361e12b6385d4bc29618223 (patch)
tree9f190702d43e89e2ddb44b6af363330f301ec8fb /src/arch/mips/MipsSystem.py
parent641e6028304187468b94753752555e9d082a77ac (diff)
downloadgem5-65cea4708e2f2f2cb361e12b6385d4bc29618223.tar.xz
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for frequencies and voltages in SrcClockDomains and VoltageDomains respectively. A separate component, DVFSHandler, provides a small interface to change operating points of the associated domains. Clock domains will be linked to voltage domains and thus allow separate clock, but shared voltage lines. Currently all the valid performance-level updates are performed with a fixed transition latency as specified for the domain. Config file example: ... vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V']) tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz'] tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz'] tsys.cluster1.clk_domain.domain_id = 0 tsys.cluster2.clk_domain.domain_id = 1 tsys.cluster1.clk_domain.voltage_domain = vd tsys.cluster2.clk_domain.voltage_domain = vd tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain, tsys.cluster2.clk_domain] tsys.dvfs_handler.enable = True
Diffstat (limited to 'src/arch/mips/MipsSystem.py')
-rw-r--r--src/arch/mips/MipsSystem.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py
index 4605b21a7..58e30f28d 100644
--- a/src/arch/mips/MipsSystem.py
+++ b/src/arch/mips/MipsSystem.py
@@ -50,7 +50,8 @@ class LinuxMipsSystem(MipsSystem):
system_type = 34
system_rev = 1 << 10
- boot_cpu_frequency = Param.Frequency(Self.cpu[0].clk_domain.clock.frequency,
+ boot_cpu_frequency = Param.Frequency(Self.cpu[0].clk_domain.clock[0]
+ .frequency,
"boot processor frequency")
class BareIronMipsSystem(MipsSystem):