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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
| commit | 0cb180ea0dcece9157ad71b4136d557c2dbcf209 (patch) | |
| tree | f65b3376cfe8cdad517f6a2a3a8c9e2cf69c987a /src/arch/mips/SConscript | |
| parent | 25884a87733cd35ef6613aaef9a8a08194267552 (diff) | |
| download | gem5-0cb180ea0dcece9157ad71b4136d557c2dbcf209.tar.xz | |
Registers: Eliminate the ISA defined floating point register file.
Diffstat (limited to 'src/arch/mips/SConscript')
| -rw-r--r-- | src/arch/mips/SConscript | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript index a88829eae..dbbdf72b3 100644 --- a/src/arch/mips/SConscript +++ b/src/arch/mips/SConscript @@ -36,7 +36,6 @@ if env['TARGET_ISA'] == 'mips': Source('faults.cc') Source('isa.cc') Source('regfile/int_regfile.cc') - Source('regfile/float_regfile.cc') Source('regfile/misc_regfile.cc') Source('regfile/regfile.cc') Source('tlb.cc') |