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| author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-16 04:27:10 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-16 04:27:10 -0800 |
| commit | da2a4acc26ba264c3c4a12495776fd6a1c4fb133 (patch) | |
| tree | f142100388b9d1403492c97b0d323728ce18ef8a /src/arch/mips/faults.cc | |
| parent | 241cc0c8402f1b9f2ec20d1cc152d96930959b2a (diff) | |
| parent | a7394ad6807bd5e85f680184bf308673ca00534a (diff) | |
| download | gem5-da2a4acc26ba264c3c4a12495776fd6a1c4fb133.tar.xz | |
Merge yet again with the main repository.
Diffstat (limited to 'src/arch/mips/faults.cc')
| -rw-r--r-- | src/arch/mips/faults.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/mips/faults.cc b/src/arch/mips/faults.cc index 524efa178..3076e0afe 100644 --- a/src/arch/mips/faults.cc +++ b/src/arch/mips/faults.cc @@ -29,6 +29,8 @@ * Authors: Gabe Black * Korey Sewell * Jaidev Patwardhan + * Zhengxing Li + * Deyuan Guo */ #include "arch/mips/faults.hh" @@ -118,7 +120,7 @@ MipsFaultBase::setExceptionState(ThreadContext *tc, uint8_t excCode) DPRINTF(MipsPRA, "PC: %s\n", pc); bool delay_slot = pc.pc() + sizeof(MachInst) != pc.npc(); tc->setMiscRegNoEffect(MISCREG_EPC, - pc.pc() - delay_slot ? sizeof(MachInst) : 0); + pc.pc() - (delay_slot ? sizeof(MachInst) : 0)); // Set Cause_EXCCODE field CauseReg cause = tc->readMiscReg(MISCREG_CAUSE); |