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authorKorey Sewell <ksewell@umich.edu>2007-11-13 16:58:16 -0500
committerKorey Sewell <ksewell@umich.edu>2007-11-13 16:58:16 -0500
commit269259004943b80916ec9b6354f2fc00c811c88b (patch)
tree4a01b0300aef6692a787f85d42280a1dbdb086e6 /src/arch/mips/faults.hh
parent422ab8bec0034a6b703578ec2c92350c6382875a (diff)
downloadgem5-269259004943b80916ec9b6354f2fc00c811c88b.tar.xz
Add in files from merge-bare-iron, get them compiling in FS and SE mode
--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
Diffstat (limited to 'src/arch/mips/faults.hh')
-rw-r--r--src/arch/mips/faults.hh349
1 files changed, 311 insertions, 38 deletions
diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh
index 441e7c27f..84c944586 100644
--- a/src/arch/mips/faults.hh
+++ b/src/arch/mips/faults.hh
@@ -1,32 +1,39 @@
/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
+ * Copyright N) 2007 MIPS Technologies, Inc. All Rights Reserved
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * This software is part of the M5 simulator.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
+ * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
+ * TO THESE TERMS AND CONDITIONS.
*
- * Authors: Gabe Black
- * Korey Sewell
+ * Permission is granted to use, copy, create derivative works and
+ * distribute this software and such derivative works for any purpose,
+ * so long as (1) the copyright notice above, this grant of permission,
+ * and the disclaimer below appear in all copies and derivative works
+ * made, (2) the copyright notice above is augmented as appropriate to
+ * reflect the addition of any new copyrightable work in a derivative
+ * work (e.g., Copyright N) <Publication Year> Copyright Owner), and (3)
+ * the name of MIPS Technologies, Inc. ($(B!H(BMIPS$(B!I(B) is not used in any
+ * advertising or publicity pertaining to the use or distribution of
+ * this software without specific, written prior authorization.
+ *
+ * THIS SOFTWARE IS PROVIDED $(B!H(BAS IS.$(B!I(B MIPS MAKES NO WARRANTIES AND
+ * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
+ * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
+ * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
+ * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
+ * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
+ * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
+ * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
+ * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
+ * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
+ * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
+ *
+ * Authors: Gabe M. Black
+ * Korey L. Sewell
+ * Jaidev Patwardhan
*/
#ifndef __MIPS_FAULTS_HH__
@@ -38,7 +45,6 @@
namespace MipsISA
{
-
typedef const Addr FaultVect;
class MipsFault : public FaultBase
@@ -47,8 +53,15 @@ class MipsFault : public FaultBase
virtual bool skipFaultingInstruction() {return false;}
virtual bool setRestartAddress() {return true;}
public:
+ Addr BadVAddr;
+ Addr EntryHi_Asid;
+ Addr EntryHi_VPN2;
+ Addr EntryHi_VPN2X;
+ Addr Context_BadVPN2;
#if FULL_SYSTEM
- void invoke(ThreadContext * tc);
+ void invoke(ThreadContext * tc) {};
+ void setExceptionState(ThreadContext *,uint8_t);
+ void setHandlerPC(Addr,ThreadContext *);
#endif
virtual FaultVect vect() = 0;
virtual FaultStat & countStat() = 0;
@@ -64,7 +77,20 @@ class MachineCheckFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
- bool isMachineCheckFault() const {return true;}
+ bool isMachineCheckFault() {return true;}
+};
+
+class NonMaskableInterrupt : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ bool isNonMaskableInterrupt() {return true;}
};
class AlignmentFault : public MipsFault
@@ -77,9 +103,39 @@ class AlignmentFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
- bool isAlignmentFault() const {return true;}
+ bool isAlignmentFault() {return true;}
+};
+
+class AddressErrorFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
+
};
+class StoreAddressErrorFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
+};
class UnimplementedOpcodeFault : public MipsFault
{
private:
@@ -92,11 +148,109 @@ class UnimplementedOpcodeFault : public MipsFault
FaultStat & countStat() {return _count;}
};
+
+class TLBRefillIFetchFault : public MipsFault
+{
+ private:
+ Addr vaddr;
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+class TLBInvalidIFetchFault : public MipsFault
+{
+ private:
+ Addr vaddr;
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+
+class NDtbMissFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
+class PDtbMissFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
+class DtbPageFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
+class DtbAcvFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
+class CacheErrorFault : public MipsFault
+{
+ private:
+ Addr vaddr;
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+
+
+
+
static inline Fault genMachineCheckFault()
{
return new MachineCheckFault;
}
+static inline Fault genAlignmentFault()
+{
+ return new AlignmentFault;
+}
+
class ResetFault : public MipsFault
{
private:
@@ -108,6 +262,56 @@ class ResetFault : public MipsFault
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
void invoke(ThreadContext * tc);
+
+};
+class SystemCallFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+
+class SoftResetFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+class DebugSingleStep : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
+};
+class DebugInterrupt : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+ void invoke(ThreadContext * tc);
};
class CoprocessorUnusableFault : public MipsFault
@@ -116,11 +320,13 @@ class CoprocessorUnusableFault : public MipsFault
static FaultName _name;
static FaultVect _vect;
static FaultStat _count;
+ int coProcID;
public:
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
void invoke(ThreadContext * tc);
+ CoprocessorUnusableFault(int _procid){ coProcID = _procid;}
};
class ReservedInstructionFault : public MipsFault
@@ -179,9 +385,15 @@ class InterruptFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
+
+ //void invoke(ThreadContext * tc);
};
-class NDtbMissFault : public MipsFault
+class TrapFault : public MipsFault
{
private:
static FaultName _name;
@@ -191,9 +403,12 @@ class NDtbMissFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
-class PDtbMissFault : public MipsFault
+class BreakpointFault : public MipsFault
{
private:
static FaultName _name;
@@ -203,9 +418,12 @@ class PDtbMissFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
-class DtbPageFault : public MipsFault
+class ItbRefillFault : public MipsFault
{
private:
static FaultName _name;
@@ -215,9 +433,11 @@ class DtbPageFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
-
-class DtbAcvFault : public MipsFault
+class DtbRefillFault : public MipsFault
{
private:
static FaultName _name;
@@ -227,9 +447,12 @@ class DtbAcvFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
-class ItbMissFault : public MipsFault
+class ItbPageFault : public MipsFault
{
private:
static FaultName _name;
@@ -239,9 +462,12 @@ class ItbMissFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
};
-class ItbPageFault : public MipsFault
+class ItbInvalidFault : public MipsFault
{
private:
static FaultName _name;
@@ -251,9 +477,28 @@ class ItbPageFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
+
};
+class TLBModifiedFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
-class ItbAcvFault : public MipsFault
+};
+
+class DtbInvalidFault : public MipsFault
{
private:
static FaultName _name;
@@ -263,6 +508,10 @@ class ItbAcvFault : public MipsFault
FaultName name() const {return _name;}
FaultVect vect() {return _vect;}
FaultStat & countStat() {return _count;}
+#if FULL_SYSTEM
+ void invoke(ThreadContext * tc);
+#endif
+
};
class FloatEnableFault : public MipsFault
@@ -277,6 +526,30 @@ class FloatEnableFault : public MipsFault
FaultStat & countStat() {return _count;}
};
+class ItbMissFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
+class ItbAcvFault : public MipsFault
+{
+ private:
+ static FaultName _name;
+ static FaultVect _vect;
+ static FaultStat _count;
+ public:
+ FaultName name() const {return _name;}
+ FaultVect vect() {return _vect;}
+ FaultStat & countStat() {return _count;}
+};
+
class IntegerOverflowFault : public MipsFault
{
private:
@@ -304,4 +577,4 @@ class DspStateDisabledFault : public MipsFault
} // MipsISA namespace
-#endif // __FAULTS_HH__
+#endif // __MIPS_FAULTS_HH__