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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-07-21 17:19:15 +0100 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-07-21 17:19:15 +0100 |
| commit | 8a476d387c84f037d0ccf3cc20dc88870ab45fec (patch) | |
| tree | 341d4975740d91056a44b13bd43e10bf175d7166 /src/arch/mips/interrupts.hh | |
| parent | d25b58036a040d8ac733b824e2865e1f5fe43e00 (diff) | |
| download | gem5-8a476d387c84f037d0ccf3cc20dc88870ab45fec.tar.xz | |
isa: Modify get/check interrupt routines
Make it so that getInterrupt *always* returns an interrupt if
checkInterrupts() returns true. This fixes/simplifies handling
of interrupts on the SMT FS CPUs (currently minor).
Diffstat (limited to 'src/arch/mips/interrupts.hh')
| -rwxr-xr-x | src/arch/mips/interrupts.hh | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/arch/mips/interrupts.hh b/src/arch/mips/interrupts.hh index b5323e4e1..2205510d2 100755 --- a/src/arch/mips/interrupts.hh +++ b/src/arch/mips/interrupts.hh @@ -107,13 +107,7 @@ class Interrupts : public SimObject void updateIntrInfo(ThreadContext *tc) const; bool interruptsPending(ThreadContext *tc) const; bool onCpuTimerInterrupt(ThreadContext *tc) const; - - bool - checkInterrupts(ThreadContext *tc) const - { - return interruptsPending(tc); - } - + bool checkInterrupts(ThreadContext *tc) const; void serialize(CheckpointOut &cp) const override |