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author | Andreas Sandberg <Andreas.Sandberg@arm.com> | 2013-01-07 13:05:35 -0500 |
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committer | Andreas Sandberg <Andreas.Sandberg@arm.com> | 2013-01-07 13:05:35 -0500 |
commit | 3db3f83a5ea4b9565db1ab6b22d18e2b33ecef98 (patch) | |
tree | a736f3746d5c38bdc98d6fb8589113556271d486 /src/arch/mips/isa.cc | |
parent | 69d419f31383ac7801e1debb62d5bbf7cb899e3c (diff) | |
download | gem5-3db3f83a5ea4b9565db1ab6b22d18e2b33ecef98.tar.xz |
arch: Make the ISA class inherit from SimObject
The ISA class on stores the contents of ID registers on many
architectures. In order to make reset values of such registers
configurable, we make the class inherit from SimObject, which allows
us to use the normal generated parameter headers.
This patch introduces a Python helper method, BaseCPU.createThreads(),
which creates a set of ISAs for each of the threads in an SMT
system. Although it is currently only needed when creating
multi-threaded CPUs, it should always be called before instantiating
the system as this is an obvious place to configure ID registers
identifying a thread/CPU.
Diffstat (limited to 'src/arch/mips/isa.cc')
-rw-r--r-- | src/arch/mips/isa.cc | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/src/arch/mips/isa.cc b/src/arch/mips/isa.cc index f6de102cd..891ed5e2f 100644 --- a/src/arch/mips/isa.cc +++ b/src/arch/mips/isa.cc @@ -36,6 +36,7 @@ #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "debug/MipsPRA.hh" +#include "params/MipsISA.hh" namespace MipsISA { @@ -87,11 +88,10 @@ ISA::miscRegNames[NumMiscRegs] = "LLFlag" }; -ISA::ISA(uint8_t num_threads, uint8_t num_vpes) +ISA::ISA(Params *p) + : SimObject(p), + numThreads(p->num_threads), numVpes(p->num_vpes) { - numThreads = num_threads; - numVpes = num_vpes; - miscRegFile.resize(NumMiscRegs); bankType.resize(NumMiscRegs); @@ -142,6 +142,12 @@ ISA::ISA(uint8_t num_threads, uint8_t num_vpes) clear(); } +const MipsISAParams * +ISA::params() const +{ + return dynamic_cast<const Params *>(_params); +} + void ISA::clear() { @@ -586,3 +592,9 @@ ISA::CP0Event::unscheduleEvent() } } + +MipsISA::ISA * +MipsISAParams::create() +{ + return new MipsISA::ISA(this); +} |