MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.

The MIPS ISA object expects to be constructed with a CPU pointer it uses to
look at other thread contexts and allow them to be manipulated with control
registers. Unfortunately, that differs from all the other ISA classes and
would complicate their implementation.

This change makes the event constructor use a CPU pointer pulled out of the
thread context passed to setMiscReg instead.

1 files changed, 3 insertions, 6 deletions

diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index 165adff83..3f7afcdd0 100644
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -64,18 +64,15 @@ namespace MipsISA
         std::vector<std::vector<MiscReg> > miscRegFile_WriteMask;
         std::vector<BankType> bankType;
 
-        BaseCPU *cpu;
-
       public:
         ISA();
-        ISA(BaseCPU *_cpu);
 
         void init();
 
         void clear(unsigned tid_or_vpn = 0);
 
         void reset(std::string core_name, ThreadID num_threads,
-                   unsigned num_vpes, BaseCPU *_cpu);
+                   unsigned num_vpes, BaseCPU *cpu);
 
         void expandForMultithreading(ThreadID num_threads, unsigned num_vpes);
 
@@ -147,11 +144,11 @@ namespace MipsISA
         };
 
         // Schedule a CP0 Update Event
-        void scheduleCP0Update(int delay = 0);
+        void scheduleCP0Update(BaseCPU *cpu, int delay = 0);
 
         // If any changes have been made, then check the state for changes
         // and if necessary alert the CPU
-        void updateCPU();
+        void updateCPU(BaseCPU *cpu);
 
         // Keep a List of CPU Events that need to be deallocated
         std::queue<CP0Event*> cp0EventRemoveList;