diff options
| author | Korey Sewell <ksewell@umich.edu> | 2009-04-18 10:42:29 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-04-18 10:42:29 -0400 |
| commit | 5c1742b822c1f4d640d30963a908386caf8c4a6e (patch) | |
| tree | 9c4ac07248378ef4b12799d19ddc65e18d9a6f5a /src/arch/mips/isa/decoder.isa | |
| parent | cc9e834e931ff70b683b8a7010269d32c0de20fd (diff) | |
| download | gem5-5c1742b822c1f4d640d30963a908386caf8c4a6e.tar.xz | |
o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
Diffstat (limited to 'src/arch/mips/isa/decoder.isa')
| -rw-r--r-- | src/arch/mips/isa/decoder.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index 8af504e55..339ca868c 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -135,7 +135,7 @@ decode OPCODE_HI default Unknown::unknown() { 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); #if FULL_SYSTEM - 0x4: syscall({{ + 0x4: syscall({{ fault = new SystemCallFault(); }}); #else |