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authorNathan Binkert <nate@binkert.org>2008-09-27 21:03:49 -0700
committerNathan Binkert <nate@binkert.org>2008-09-27 21:03:49 -0700
commit80d9be86e616e819cc3c9a0bbc8a42a5beb41247 (patch)
tree311a579c3be054b5dfb603ac6040af3027d416a2 /src/arch/mips/isa/decoder.isa
parentcf7ddd8e8ac92cf5b90cd89a028414dd782c645a (diff)
downloadgem5-80d9be86e616e819cc3c9a0bbc8a42a5beb41247.tar.xz
gcc: Add extra parens to quell warnings.
Even though we're not incorrect about operator precedence, let's add some parens in some particularly confusing places to placate GCC 4.3 so that we don't have to turn the warning off. Agreed that this is a bit of a pain for those users who get the order of operations correct, but it is likely to prevent bugs in certain cases.
Diffstat (limited to 'src/arch/mips/isa/decoder.isa')
-rw-r--r--src/arch/mips/isa/decoder.isa26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index b1cd03ca1..0a12c4f6e 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -416,16 +416,16 @@ decode OPCODE_HI default Unknown::unknown() {
Ctrl_Base_DepTag);
break;
case 25:
- data = 0 | fcsr_val & 0xFE000000 >> 24
- | fcsr_val & 0x00800000 >> 23;
+ data = (fcsr_val & 0xFE000000 >> 24)
+ | (fcsr_val & 0x00800000 >> 23);
break;
case 26:
- data = 0 | fcsr_val & 0x0003F07C;
+ data = fcsr_val & 0x0003F07C;
break;
case 28:
- data = 0 | fcsr_val & 0x00000F80
- | fcsr_val & 0x01000000 >> 21
- | fcsr_val & 0x00000003;
+ data = (fcsr_val & 0x00000F80)
+ | (fcsr_val & 0x01000000 >> 21)
+ | (fcsr_val & 0x00000003);
break;
case 31:
data = fcsr_val;
@@ -1963,7 +1963,7 @@ decode OPCODE_HI default Unknown::unknown() {
0x0: decode OP_LO {
format IntOp {
0x0: append({{ Rt.uw = (Rt.uw << RD) | bits(Rs.uw,RD-1,0); }});
- 0x1: prepend({{ Rt.uw = (Rt.uw >> RD) | (bits(Rs.uw,RD-1,0) << 32-RD); }});
+ 0x1: prepend({{ Rt.uw = (Rt.uw >> RD) | (bits(Rs.uw, RD - 1, 0) << (32 - RD)); }});
}
}
0x2: decode OP_LO {
@@ -2050,11 +2050,11 @@ decode OPCODE_HI default Unknown::unknown() {
format LoadUnalignedMemory {
0x2: lwl({{ uint32_t mem_shift = 24 - (8 * byte_offset);
Rt.uw = mem_word << mem_shift |
- Rt.uw & mask(mem_shift);
+ (Rt.uw & mask(mem_shift));
}});
0x6: lwr({{ uint32_t mem_shift = 8 * byte_offset;
- Rt.uw = Rt.uw & (mask(mem_shift) << (32 - mem_shift)) |
- mem_word >> mem_shift;
+ Rt.uw = (Rt.uw & (mask(mem_shift) << (32 - mem_shift))) |
+ (mem_word >> mem_shift);
}});
}
}
@@ -2069,12 +2069,12 @@ decode OPCODE_HI default Unknown::unknown() {
format StoreUnalignedMemory {
0x2: swl({{ uint32_t reg_shift = 24 - (8 * byte_offset);
uint32_t mem_shift = 32 - reg_shift;
- mem_word = mem_word & (mask(reg_shift) << mem_shift) |
- Rt.uw >> reg_shift;
+ mem_word = (mem_word & (mask(reg_shift) << mem_shift)) |
+ (Rt.uw >> reg_shift);
}});
0x6: swr({{ uint32_t reg_shift = 8 * byte_offset;
mem_word = Rt.uw << reg_shift |
- mem_word & (mask(reg_shift));
+ (mem_word & (mask(reg_shift)));
}});
}
format CP0Control {