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author | Korey Sewell <ksewell@umich.edu> | 2006-06-14 19:31:21 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-06-14 19:31:21 -0400 |
commit | 38ecb6a2ee7fbe4e24f83e50f8ca95b04197e0f9 (patch) | |
tree | 2cd43b867a69853c83040c4d96456b9248f96ea4 /src/arch/mips/isa/formats/mem.isa | |
parent | 2a9becba44f1d70b05100c04b95d475c43099fa9 (diff) | |
download | gem5-38ecb6a2ee7fbe4e24f83e50f8ca95b04197e0f9.tar.xz |
-luxc1 fix
-noop templates
-trap disassembly
src/arch/mips/isa/decoder.isa:
luxc1 uses doubleword, not single
src/arch/mips/isa/formats/int.isa:
use new nop decode template
src/arch/mips/isa/formats/mem.isa:
Noop templates
src/arch/mips/isa/formats/noop.isa:
redo noop templates
src/arch/mips/isa/formats/trap.isa:
fix for trap disassembly
--HG--
extra : convert_revision : 56f13e88abdcbd03ab828cff5d775c993157ae96
Diffstat (limited to 'src/arch/mips/isa/formats/mem.isa')
-rw-r--r-- | src/arch/mips/isa/formats/mem.isa | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa index cf6d3de74..5a8930a08 100644 --- a/src/arch/mips/isa/formats/mem.isa +++ b/src/arch/mips/isa/formats/mem.isa @@ -499,23 +499,11 @@ def template MiscCompleteAcc {{ } }}; -// load instructions use Rt as dest, so check for -// Rt == 0 to detect nops -def template LoadNopCheckDecode {{ - { - MipsStaticInst *i = new %(class_name)s(machInst); - if (RT == 0) { - i = makeNop(i); - } - return i; - } -}}; - def format LoadMemory(memacc_code, ea_code = {{ EA = Rs + disp; }}, mem_flags = [], inst_flags = []) {{ (header_output, decoder_output, decode_block, exec_output) = \ LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, - decode_template = LoadNopCheckDecode, + decode_template = ImmNopCheckDecode, exec_template_base = 'Load') }}; @@ -530,7 +518,7 @@ def format LoadIndexedMemory(memacc_code, ea_code = {{ EA = Rs + Rt; }}, mem_flags = [], inst_flags = []) {{ (header_output, decoder_output, decode_block, exec_output) = \ LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, - decode_template = LoadNopCheckDecode, + decode_template = ImmNopCheckDecode, exec_template_base = 'Load') }}; @@ -554,7 +542,7 @@ def format LoadUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; (header_output, decoder_output, decode_block, exec_output) = \ LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, - decode_template = LoadNopCheckDecode, + decode_template = ImmNopCheckDecode, exec_template_base = 'Load') }}; @@ -571,7 +559,6 @@ def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; (header_output, decoder_output, decode_block, exec_output) = \ LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, - decode_template = LoadNopCheckDecode, exec_template_base = 'Store') }}; |