diff options
author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-23 13:26:30 -0700 |
---|---|---|
committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-23 13:26:30 -0700 |
commit | 245b0bd9b94bfaaa188b7e945f91c0e4a9909cbe (patch) | |
tree | 7ca0de263839f60d35cd6cf0ca8c17d94c375209 /src/arch/mips/isa/formats/util.isa | |
parent | 57ff2604e59647c6afe988767186f13c80c1aa16 (diff) | |
parent | ac19e0c5050219cbb0579a319fa3fab5cf92835d (diff) | |
download | gem5-245b0bd9b94bfaaa188b7e945f91c0e4a9909cbe.tar.xz |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
src/base/traceflags.py:
Hand merge.
--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
Diffstat (limited to 'src/arch/mips/isa/formats/util.isa')
-rw-r--r-- | src/arch/mips/isa/formats/util.isa | 40 |
1 files changed, 1 insertions, 39 deletions
diff --git a/src/arch/mips/isa/formats/util.isa b/src/arch/mips/isa/formats/util.isa index 884e6f727..eea616568 100644 --- a/src/arch/mips/isa/formats/util.isa +++ b/src/arch/mips/isa/formats/util.isa @@ -88,7 +88,6 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, + completeAccTemplate.subst(iop)) }}; - output header {{ std::string inst2string(MachInst machInst); }}; @@ -97,7 +96,7 @@ output decoder {{ std::string inst2string(MachInst machInst) { - std::string str = ""; + string str = ""; uint32_t mask = 0x80000000; for(int i=0; i < 32; i++) { @@ -114,40 +113,3 @@ std::string inst2string(MachInst machInst) } }}; -output exec {{ - - using namespace MipsISA; - - /// CLEAR ALL CPU INST/EXE HAZARDS - inline void - clear_exe_inst_hazards() - { - //CODE HERE - } - - - /// Check "FP enabled" machine status bit. Called when executing any FP - /// instruction in full-system mode. - /// @retval Full-system mode: NoFault if FP is enabled, FenFault - /// if not. Non-full-system mode: always returns NoFault. -#if FULL_SYSTEM - inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) - { - Fault fault = NoFault; // dummy... this ipr access should not fault - if (!Mips34k::ICSR_FPE(xc->readIpr(MipsISA::IPR_ICSR, fault))) { - fault = FloatEnableFault; - } - return fault; - } -#else - inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) - { - return NoFault; - } -#endif - - - -}}; - - |