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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
commit25884a87733cd35ef6613aaef9a8a08194267552 (patch)
tree3eb831102c76206ba5ba4e19b94810be67ce108f /src/arch/mips/isa
parent32daf6fc3fd34af0023ae74c2a1f8dd597f87242 (diff)
downloadgem5-25884a87733cd35ef6613aaef9a8a08194267552.tar.xz
Registers: Get rid of the float register width parameter.
Diffstat (limited to 'src/arch/mips/isa')
-rw-r--r--src/arch/mips/isa/formats/fp.isa34
1 files changed, 9 insertions, 25 deletions
diff --git a/src/arch/mips/isa/formats/fp.isa b/src/arch/mips/isa/formats/fp.isa
index 74200a74a..52fcd0724 100644
--- a/src/arch/mips/isa/formats/fp.isa
+++ b/src/arch/mips/isa/formats/fp.isa
@@ -104,25 +104,14 @@ output exec {{
Trace::InstRecord *traceData)
{
uint64_t mips_nan = 0;
- T src_op = 0;
- int size = sizeof(src_op) * 8;
+ assert(sizeof(T) == 4);
for (int i = 0; i < inst->numSrcRegs(); i++) {
- uint64_t src_bits = xc->readFloatRegOperandBits(inst, 0, size);
-
- if (isNan(&src_bits, size) ) {
- if (isSnan(&src_bits, size)) {
- switch (size)
- {
- case 32: mips_nan = MIPS32_QNAN; break;
- case 64: mips_nan = MIPS64_QNAN; break;
- default: panic("Unsupported Floating Point Size (%d)", size);
- }
- } else {
- mips_nan = src_bits;
- }
+ uint64_t src_bits = xc->readFloatRegOperandBits(inst, 0);
- xc->setFloatRegOperandBits(inst, 0, mips_nan, size);
+ if (isNan(&src_bits, 32) ) {
+ mips_nan = MIPS32_QNAN;
+ xc->setFloatRegOperandBits(inst, 0, mips_nan);
if (traceData) { traceData->setData(mips_nan); }
return true;
}
@@ -137,18 +126,13 @@ output exec {{
{
uint64_t mips_nan = 0;
T src_op = dest_val;
- int size = sizeof(src_op) * 8;
+ assert(sizeof(T) == 4);
- if (isNan(&src_op, size)) {
- switch (size)
- {
- case 32: mips_nan = MIPS32_QNAN; break;
- case 64: mips_nan = MIPS64_QNAN; break;
- default: panic("Unsupported Floating Point Size (%d)", size);
- }
+ if (isNan(&src_op, 32)) {
+ mips_nan = MIPS32_QNAN;
//Set value to QNAN
- cpu->setFloatRegOperandBits(inst, 0, mips_nan, size);
+ cpu->setFloatRegOperandBits(inst, 0, mips_nan);
//Read FCSR from FloatRegFile
uint32_t fcsr_bits = cpu->tcBase()->readFloatRegBits(FCSR);