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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-21 01:09:05 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-21 01:09:05 -0700 |
| commit | 74584d79b66b3459c72db6c74bfa9e22ee1ae23b (patch) | |
| tree | f8a98156083103e9f883235e2fd91cccba76f179 /src/arch/mips/isa | |
| parent | 7548082d3baf578fe984c79f414dbefd96091359 (diff) | |
| download | gem5-74584d79b66b3459c72db6c74bfa9e22ee1ae23b.tar.xz | |
MIPS: Get MIPS_FS to compile, more style fixes.
Some breakage was from my BitUnion change, some was much older.
Diffstat (limited to 'src/arch/mips/isa')
| -rw-r--r-- | src/arch/mips/isa/decoder.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index 7a6d5db05..60bc15513 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -771,7 +771,7 @@ decode OPCODE_HI default Unknown::unknown() { NewEntry.OffsetMask = ((1<<NewEntry.AddrShiftAmount)-1); MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); - Config3Reg config3 = Config3 + Config3Reg config3 = Config3; PageGrainReg pageGrain = PageGrain; int SP = 0; if (bits(config3, config3.sp) == 1 && @@ -836,7 +836,7 @@ decode OPCODE_HI default Unknown::unknown() { NewEntry.OffsetMask = ((1 << NewEntry.AddrShiftAmount) - 1); MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); - Config3Reg config3 = Config3 + Config3Reg config3 = Config3; PageGrainReg pageGrain = PageGrain; int SP = 0; if (bits(config3, config3.sp) == 1 && |