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author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:25:01 -0700 |
commit | 3e5f4876630169e92b3ad736d747bcba1b79c062 (patch) | |
tree | cc6f7aa2f13331839567c1b5844ea2d8412df163 /src/arch/mips/isa | |
parent | ca8598147835cc3bf4cb6125b4f32cbd941f1ae7 (diff) | |
download | gem5-3e5f4876630169e92b3ad736d747bcba1b79c062.tar.xz |
Memory: Rename LOCKED for load locked store conditional to LLSC.
Diffstat (limited to 'src/arch/mips/isa')
-rw-r--r-- | src/arch/mips/isa/decoder.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index 68a63a458..a463093ec 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -2089,7 +2089,7 @@ decode OPCODE_HI default Unknown::unknown() { 0x6: decode OPCODE_LO { format LoadMemory { - 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LOCKED); + 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LLSC); 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 0x5: ldc1({{ Ft.ud = Mem.ud; }}); } @@ -2103,7 +2103,7 @@ decode OPCODE_HI default Unknown::unknown() { 0x0: StoreCond::sc({{ Mem.uw = Rt.uw;}}, {{ uint64_t tmp = write_result; Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw; - }}, mem_flags=LOCKED, inst_flags = IsStoreConditional); + }}, mem_flags=LLSC, inst_flags = IsStoreConditional); format StoreMemory { 0x1: swc1({{ Mem.uw = Ft.uw;}}); |