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authorAli Saidi <saidi@eecs.umich.edu>2006-07-19 17:59:04 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-07-19 17:59:04 -0400
commit15e5ce96c76a20b9b27e5f7d7ed29e962422ad1a (patch)
tree610a888b2de5d25c166f65819d8ad3058d13723c /src/arch/mips/isa_traits.cc
parentb36796914af8bfc6729cc8a519e57572460e43e8 (diff)
parent6175f712b3216f3e5387b07d9c41c1931c09acd9 (diff)
downloadgem5-15e5ce96c76a20b9b27e5f7d7ed29e962422ad1a.tar.xz
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 8c747208d72ffbb0160a2ad4a75383420debdf83
Diffstat (limited to 'src/arch/mips/isa_traits.cc')
-rw-r--r--src/arch/mips/isa_traits.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/mips/isa_traits.cc b/src/arch/mips/isa_traits.cc
index 85acc4e8c..a8b41270e 100644
--- a/src/arch/mips/isa_traits.cc
+++ b/src/arch/mips/isa_traits.cc
@@ -46,6 +46,12 @@ MipsISA::copyRegs(ThreadContext *src, ThreadContext *dest)
}
void
+MipsISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+{
+ panic("Copy Misc. Regs Not Implemented Yet\n");
+}
+
+void
MipsISA::MiscRegFile::copyMiscRegs(ThreadContext *tc)
{
panic("Copy Misc. Regs Not Implemented Yet\n");