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author | Korey Sewell <ksewell@umich.edu> | 2006-06-09 17:47:23 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-06-09 17:47:23 -0400 |
commit | f8df550db826c9fe29cc184fce873db6789e42ee (patch) | |
tree | 96aa51eef059ef3740c5e67459682f4256a95812 /src/arch/mips/isa_traits.cc | |
parent | caca57421b32410f6ff1356ae75684891337073f (diff) | |
parent | b94fecfa10236b51ded904a5f1a57f4a5ebe7acc (diff) | |
download | gem5-f8df550db826c9fe29cc184fce873db6789e42ee.tar.xz |
Merge zizzer:/bk/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-release
--HG--
extra : convert_revision : 82b83199a36059d4b402f89f7db2de299ea59c1e
Diffstat (limited to 'src/arch/mips/isa_traits.cc')
-rw-r--r-- | src/arch/mips/isa_traits.cc | 73 |
1 files changed, 2 insertions, 71 deletions
diff --git a/src/arch/mips/isa_traits.cc b/src/arch/mips/isa_traits.cc index 056c8baff..9f3817a60 100644 --- a/src/arch/mips/isa_traits.cc +++ b/src/arch/mips/isa_traits.cc @@ -42,6 +42,7 @@ using namespace std; void MipsISA::copyRegs(ThreadContext *src, ThreadContext *dest) { + panic("Copy Regs Not Implemented Yet\n"); /*fpcr = xc->readMiscReg(MipsISA::Fpcr_DepTag); uniq = xc->readMiscReg(MipsISA::Uniq_DepTag); lock_flag = xc->readMiscReg(MipsISA::Lock_Flag_DepTag); @@ -55,6 +56,7 @@ MipsISA::copyRegs(ThreadContext *src, ThreadContext *dest) void MipsISA::MiscRegFile::copyMiscRegs(ThreadContext *tc) { + panic("Copy Misc. Regs Not Implemented Yet\n"); /*fpcr = xc->readMiscReg(MipsISA::Fpcr_DepTag); uniq = xc->readMiscReg(MipsISA::Uniq_DepTag); lock_flag = xc->readMiscReg(MipsISA::Lock_Flag_DepTag); @@ -63,77 +65,6 @@ MipsISA::MiscRegFile::copyMiscRegs(ThreadContext *tc) #endif*/ } -uint64_t -MipsISA::fpConvert(double fp_val, ConvertType cvt_type) -{ - - switch (cvt_type) - { - case SINGLE_TO_DOUBLE: - double sdouble_val = fp_val; - void *sdouble_ptr = &sdouble_val; - uint64_t sdp_bits = *(uint64_t *) sdouble_ptr; - return sdp_bits; - - case SINGLE_TO_WORD: - int32_t sword_val = (int32_t) fp_val; - void *sword_ptr = &sword_val; - uint64_t sword_bits= *(uint32_t *) sword_ptr; - return sword_bits; - - case WORD_TO_SINGLE: - float wfloat_val = fp_val; - void *wfloat_ptr = &wfloat_val; - uint64_t wfloat_bits = *(uint32_t *) wfloat_ptr; - return wfloat_bits; - - case WORD_TO_DOUBLE: - double wdouble_val = fp_val; - void *wdouble_ptr = &wdouble_val; - uint64_t wdp_bits = *(uint64_t *) wdouble_ptr; - return wdp_bits; - - default: - panic("Invalid Floating Point Conversion Type (%d). See \"types.hh\" for List of Conversions\n",cvt_type); - return 0; - } -} - -double -MipsISA::roundFP(double val, int digits) -{ - double digit_offset = pow(10.0,digits); - val = val * digit_offset; - val = val + 0.5; - val = floor(val); - val = val / digit_offset; - return val; -} - -double -MipsISA::truncFP(double val) -{ - int trunc_val = (int) val; - return (double) trunc_val; -} - -bool -MipsISA::getFPConditionCode(uint32_t fcsr_reg, int cc) -{ - //uint32_t cc_bits = xc->readFloatReg(35); - return false;//regFile.floatRegfile.getConditionCode(cc); -} - -uint32_t -MipsISA::makeCCVector(uint32_t fcsr, int num, bool val) -{ - int shift = (num == 0) ? 22 : num + 23; - - fcsr = fcsr | (val << shift); - - return fcsr; -} - #if FULL_SYSTEM static inline Addr |