Add in files from merge-bare-iron, get them compiling in FS and SE mode

--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251

1 files changed, 146 insertions, 0 deletions

diff --git a/src/arch/mips/linux/system.hh b/src/arch/mips/linux/system.hh
new file mode 100644
index 000000000..9577d7def
--- /dev/null
+++ b/src/arch/mips/linux/system.hh
@@ -0,0 +1,146 @@
+/*
+ * Copyright .AN) 2007 MIPS Technologies, Inc.  All Rights Reserved
+ *
+ * This software is part of the M5 simulator.
+ *
+ * THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
+ * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
+ * TO THESE TERMS AND CONDITIONS.
+ *
+ * Permission is granted to use, copy, create derivative works and
+ * distribute this software and such derivative works for any purpose,
+ * so long as (1) the copyright notice above, this grant of permission,
+ * and the disclaimer below appear in all copies and derivative works
+ * made, (2) the copyright notice above is augmented as appropriate to
+ * reflect the addition of any new copyrightable work in a derivative
+ * work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
+ * the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
+ * advertising or publicity pertaining to the use or distribution of
+ * this software without specific, written prior authorization.
+ *
+ * THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B  MIPS MAKES NO WARRANTIES AND
+ * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
+ * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
+ * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
+ * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
+ * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
+ * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
+ * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
+ * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
+ * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
+ * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
+ *
+ * Authors: Ali G. Saidi
+ *          Lisa R. Hsu
+ *          Nathan L. Binkert
+ */
+
+#ifndef __ARCH_MIPS_LINUX_SYSTEM_HH__
+#define __ARCH_MIPS_LINUX_SYSTEM_HH__
+
+class ThreadContext;
+
+class BreakPCEvent;
+class IdleStartEvent;
+
+#include "arch/mips/idle_event.hh"
+#include "arch/mips/system.hh"
+#include "kern/linux/events.hh"
+#include "params/LinuxMipsSystem.hh"
+
+using namespace MipsISA;
+using namespace Linux;
+
+/**
+ * This class contains linux specific system code (Loading, Events).
+ * It points to objects that are the system binaries to load and patches them
+ * appropriately to work in simulator.
+ */
+class LinuxMipsSystem : public MipsSystem
+{
+  private:
+    class SkipDelayLoopEvent : public SkipFuncEvent
+    {
+      public:
+        SkipDelayLoopEvent(PCEventQueue *q, const std::string &desc, Addr addr)
+            : SkipFuncEvent(q, desc, addr) {}
+        virtual void process(ThreadContext *tc);
+    };
+
+    class PrintThreadInfo : public PCEvent
+    {
+      public:
+        PrintThreadInfo(PCEventQueue *q, const std::string &desc, Addr addr)
+            : PCEvent(q, desc, addr) {}
+        virtual void process(ThreadContext *tc);
+    };
+
+
+    /**
+     * Addresses defining where the kernel bootloader places various
+     * elements.  Details found in include/asm-mips/system.h
+     */
+    Addr KernelStart; // Lookup the symbol swapper_pg_dir
+
+  public:
+    Addr InitStack() const { return KernelStart + 0x02000; }
+    Addr EmptyPGT() const  { return KernelStart + 0x04000; }
+    Addr EmptyPGE() const  { return KernelStart + 0x08000; }
+    Addr ZeroPGE() const   { return KernelStart + 0x0A000; }
+    Addr StartAddr() const { return KernelStart + 0x10000; }
+
+    Addr Param() const { return ZeroPGE() + 0x0; }
+    Addr CommandLine() const { return Param() + 0x0; }
+    Addr InitrdStart() const { return Param() + 0x100; }
+    Addr InitrdSize() const { return Param() + 0x108; }
+    static const int CommandLineSize = 256;
+
+  private:
+#ifndef NDEBUG
+    /** Event to halt the simulator if the kernel calls panic()  */
+    BreakPCEvent *kernelPanicEvent;
+
+    /** Event to halt the simulator if the kernel calls die_if_kernel  */
+    BreakPCEvent *kernelDieEvent;
+#endif
+
+    /**
+     * Event to skip determine_cpu_caches() because we don't support
+     * the IPRs that the code can access to figure out cache sizes
+     */
+    SkipFuncEvent *skipCacheProbeEvent;
+
+    /** PC based event to skip the ide_delay_50ms() call */
+    SkipFuncEvent *skipIdeDelay50msEvent;
+
+    /**
+     * PC based event to skip the dprink() call and emulate its
+     * functionality
+     */
+    DebugPrintkEvent *debugPrintkEvent;
+
+    /**
+     * Skip calculate_delay_loop() rather than waiting for this to be
+     * calculated
+     */
+    SkipDelayLoopEvent *skipDelayLoopEvent;
+
+    /**
+     * Event to print information about thread switches if the trace flag
+     * Thread is set
+     */
+    PrintThreadInfo *printThreadEvent;
+
+    /** Grab the PCBB of the idle process when it starts */
+    IdleStartEvent *idleStartEvent;
+
+  public:
+    typedef LinuxMipsSystemParams Params;
+    LinuxMipsSystem(Params *p);
+    ~LinuxMipsSystem();
+
+    void setDelayLoop(ThreadContext *tc);
+};
+
+#endif // __ARCH_MIPS_LINUX_SYSTEM_HH__