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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
commit | dc8018a5c3482008232e6faaa2d96cf20aed7485 (patch) | |
tree | a972ac4544e227397595baf6eeb30e1854f480fc /src/arch/mips/pagetable.hh | |
parent | c8c82f09a282832d919f7eb073a47be838e65b29 (diff) | |
download | gem5-dc8018a5c3482008232e6faaa2d96cf20aed7485.tar.xz |
style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'.
Diffstat (limited to 'src/arch/mips/pagetable.hh')
-rwxr-xr-x | src/arch/mips/pagetable.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/mips/pagetable.hh b/src/arch/mips/pagetable.hh index cc4e4a859..cb129fba7 100755 --- a/src/arch/mips/pagetable.hh +++ b/src/arch/mips/pagetable.hh @@ -65,7 +65,7 @@ struct PTE bool V1; // Odd entry Valid Bit uint8_t C1; // Cache Coherency Bits (3 bits) - /* + /* * The next few variables are put in as optimizations to reduce * TLB lookup overheads. For a given Mask, what is the address shift * amount, and what is the OffsetMask |