diff options
author | Brandon Potter <brandon.potter@amd.com> | 2016-11-09 14:27:40 -0600 |
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committer | Brandon Potter <brandon.potter@amd.com> | 2016-11-09 14:27:40 -0600 |
commit | 3886c4a8f2e1bfe17cbf7a5a76ba0fc978c6bb48 (patch) | |
tree | 5a1ce6cbf42009fc9199c7ecfb068890ca74dbd4 /src/arch/mips/process.cc | |
parent | 7b6cf951e2f0fa70d6599f1e1d03f664b674a75e (diff) | |
download | gem5-3886c4a8f2e1bfe17cbf7a5a76ba0fc978c6bb48.tar.xz |
syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead
The EIOProcess class was removed recently and it was the only other class
which derived from Process. Since every Process invocation is also a
LiveProcess invocation, it makes sense to simplify the organization by
combining the fields from LiveProcess into Process.
Diffstat (limited to 'src/arch/mips/process.cc')
-rw-r--r-- | src/arch/mips/process.cc | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index d26850604..9abe410c7 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -47,9 +47,8 @@ using namespace std; using namespace MipsISA; -MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, - ObjectFile *objFile) - : LiveProcess(params, objFile) +MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile) + : Process(params, objFile) { // Set up stack. On MIPS, stack starts at the top of kuseg // user address space. MIPS stack grows down from here @@ -67,16 +66,16 @@ MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, } void -MipsLiveProcess::initState() +MipsProcess::initState() { - LiveProcess::initState(); + Process::initState(); argsInit<uint32_t>(PageBytes); } template<class IntType> void -MipsLiveProcess::argsInit(int pageSize) +MipsProcess::argsInit(int pageSize) { int intSize = sizeof(IntType); @@ -191,22 +190,21 @@ MipsLiveProcess::argsInit(int pageSize) MipsISA::IntReg -MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i) +MipsProcess::getSyscallArg(ThreadContext *tc, int &i) { assert(i < 6); return tc->readIntReg(FirstArgumentReg + i++); } void -MipsLiveProcess::setSyscallArg(ThreadContext *tc, - int i, MipsISA::IntReg val) +MipsProcess::setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val) { assert(i < 6); tc->setIntReg(FirstArgumentReg + i, val); } void -MipsLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) +MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) { if (sysret.successful()) { // no error |