diff options
author | Nathan Binkert <nate@binkert.org> | 2009-05-26 09:23:13 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2009-05-26 09:23:13 -0700 |
commit | 47877cf2dbd6ee2f1cf9b2c609d37b0589e876ca (patch) | |
tree | 6beb00dfe7e31b9bf82f7aba4710b0c487b6543f /src/arch/mips/regfile/float_regfile.cc | |
parent | d93392df28fc6c9a5c70fb6252a12afdc72d9344 (diff) | |
download | gem5-47877cf2dbd6ee2f1cf9b2c609d37b0589e876ca.tar.xz |
types: add a type for thread IDs and try to use it everywhere
Diffstat (limited to 'src/arch/mips/regfile/float_regfile.cc')
-rw-r--r-- | src/arch/mips/regfile/float_regfile.cc | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/arch/mips/regfile/float_regfile.cc b/src/arch/mips/regfile/float_regfile.cc index 122d7c229..2b32bd3af 100644 --- a/src/arch/mips/regfile/float_regfile.cc +++ b/src/arch/mips/regfile/float_regfile.cc @@ -42,7 +42,7 @@ FloatRegFile::clear() } double -FloatRegFile::readReg(int floatReg, int width, unsigned tid) +FloatRegFile::readReg(int floatReg, int width, ThreadID tid) { switch(width) { @@ -65,7 +65,7 @@ FloatRegFile::readReg(int floatReg, int width, unsigned tid) } FloatRegBits -FloatRegFile::readRegBits(int floatReg, int width, unsigned tid) +FloatRegFile::readRegBits(int floatReg, int width, ThreadID tid) { if (floatReg < NumFloatArchRegs - 1) { switch(width) @@ -88,9 +88,9 @@ FloatRegFile::readRegBits(int floatReg, int width, unsigned tid) } Fault -FloatRegFile::setReg(int floatReg, const FloatRegVal &val, int width, unsigned tid) +FloatRegFile::setReg(int floatReg, const FloatRegVal &val, int width, + ThreadID tid) { - using namespace std; switch(width) { case SingleWidth: @@ -118,10 +118,9 @@ FloatRegFile::setReg(int floatReg, const FloatRegVal &val, int width, unsigned t } Fault -FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width, unsigned tid) +FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width, + ThreadID tid) { - using namespace std; - switch(width) { case SingleWidth: |