Add in files from merge-bare-iron, get them compiling in FS and SE mode

--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251

1 files changed, 5 insertions, 96 deletions

diff --git a/src/arch/mips/regfile/float_regfile.hh b/src/arch/mips/regfile/float_regfile.hh
index 21c16c238..1c869cc4e 100644
--- a/src/arch/mips/regfile/float_regfile.hh
+++ b/src/arch/mips/regfile/float_regfile.hh
@@ -88,104 +88,13 @@ namespace MipsISA
 
       public:
 
-        void clear() { bzero(&regs, sizeof(regs)); }
-
-        double readReg(int floatReg, int width, unsigned tid = 0)
-        {
-            switch(width)
-            {
-              case SingleWidth:
-                {
-                    void *float_ptr = &regs[floatReg];
-                    return *(float *) float_ptr;
-                }
-
-              case DoubleWidth:
-                {
-                    uint64_t double_val = (FloatReg64)regs[floatReg + 1] << 32 | regs[floatReg];
-                    void *double_ptr = &double_val;
-                    return *(double *) double_ptr;
-                }
-
-              default:
-                panic("Attempted to read a %d bit floating point register!", width);
-            }
-        }
-
-        FloatRegBits readRegBits(int floatReg, int width, unsigned tid = 0)
-        {
-            if (floatReg < NumFloatArchRegs - 1) {
-                switch(width)
-                {
-                  case SingleWidth:
-                    return regs[floatReg];
-
-                  case DoubleWidth:
-                    return (FloatReg64)regs[floatReg + 1] << 32 | regs[floatReg];
-
-                  default:
-                    panic("Attempted to read a %d bit floating point register!", width);
-                }
-            } else {
-                if (width > SingleWidth)
-                    assert("Control Regs are only 32 bits wide");
-
-                return regs[floatReg];
-            }
-        }
-
-        Fault setReg(int floatReg, const FloatRegVal &val, int width, unsigned tid = 0)
-        {
-            using namespace std;
-            switch(width)
-            {
-              case SingleWidth:
-                {
-                    float temp = val;
-                    void *float_ptr = &temp;
-                    regs[floatReg] = *(FloatReg32 *) float_ptr;
-                    break;
-                }
-
-              case DoubleWidth:
-                {
-                    const void *double_ptr = &val;
-                    FloatReg64 temp_double = *(FloatReg64 *) double_ptr;
-                    regs[floatReg + 1] = bits(temp_double, 63, 32);
-                    regs[floatReg] = bits(temp_double, 31, 0);
-                    break;
-                }
-
-              default:
-                panic("Attempted to read a %d bit floating point register!", width);
-            }
-
-            return NoFault;
-        }
-
-        Fault setRegBits(int floatReg, const FloatRegBits &val, int width, unsigned tid = 0)
-        {
-            using namespace std;
-
-            switch(width)
-            {
-              case SingleWidth:
-                regs[floatReg] = val;
-                break;
-
-              case DoubleWidth:
-                regs[floatReg + 1] = bits(val, 63, 32);
-                regs[floatReg] = bits(val, 31, 0);
-                break;
-
-              default:
-                panic("Attempted to read a %d bit floating point register!", width);
-            }
-            return NoFault;
-        }
+        void clear();
+        double readReg(int floatReg, int width, unsigned tid = 0);
+        FloatRegBits readRegBits(int floatReg, int width, unsigned tid = 0);
+        Fault setReg(int floatReg, const FloatRegVal &val, int width, unsigned tid = 0);
+        Fault setRegBits(int floatReg, const FloatRegBits &val, int width, unsigned tid = 0);
 
         void serialize(std::ostream &os);
-
         void unserialize(Checkpoint *cp, const std::string &section);
     };