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| author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:13 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:13 -0400 |
| commit | 1c8dfd92543aba5f49e464b17e7e8143fc01a58c (patch) | |
| tree | 3c5b9059b07e8d0bccdf826249330bfcb8c5c1cc /src/arch/mips/regfile/regfile.cc | |
| parent | 63db33c4b1cd7a071c2a2fe47bda21a73618d054 (diff) | |
| download | gem5-1c8dfd92543aba5f49e464b17e7e8143fc01a58c.tar.xz | |
inorder-alpha-port: initial inorder support of ALPHA
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
Diffstat (limited to 'src/arch/mips/regfile/regfile.cc')
0 files changed, 0 insertions, 0 deletions