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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
commit | 43345bff6c4ee2fd5a35760776898eefa690329e (patch) | |
tree | abab8a0c414f7d1053f987530cfcbe0ae4974d03 /src/arch/mips/regfile/regfile.hh | |
parent | 1b29f1621d714c6dc0f2ab921f12e9eb1dbfcd46 (diff) | |
download | gem5-43345bff6c4ee2fd5a35760776898eefa690329e.tar.xz |
Registers: Move the PCs out of the ISAs and into the CPUs.
Diffstat (limited to 'src/arch/mips/regfile/regfile.hh')
-rw-r--r-- | src/arch/mips/regfile/regfile.hh | 38 |
1 files changed, 13 insertions, 25 deletions
diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh index 28d295022..71775edc4 100644 --- a/src/arch/mips/regfile/regfile.hh +++ b/src/arch/mips/regfile/regfile.hh @@ -32,11 +32,10 @@ #ifndef __ARCH_MIPS_REGFILE_REGFILE_HH__ #define __ARCH_MIPS_REGFILE_REGFILE_HH__ -#include "arch/mips/types.hh" +#include <iostream> +#include <string> + #include "arch/mips/isa_traits.hh" -//#include "arch/mips/mt.hh" -//#include "cpu/base.hh" -#include "sim/faults.hh" class BaseCPU; class Checkpoint; @@ -95,33 +94,22 @@ namespace MipsISA class RegFile { - protected: - Addr pc; // program counter - Addr npc; // next-cycle program counter - Addr nnpc; // next-next-cycle program counter - // used to implement branch delay slot - // not real register - public: - void clear(); + void clear() + {} void reset(std::string core_name, ThreadID num_threads, - unsigned num_vpes, BaseCPU *_cpu); + unsigned num_vpes, BaseCPU *_cpu) + {} - void setShadowSet(int css); + void setShadowSet(int css) + {} public: - Addr readPC(); - void setPC(Addr val); - - Addr readNextPC(); - void setNextPC(Addr val); - - Addr readNextNPC(); - void setNextNPC(Addr val); - - void serialize(EventManager *em, std::ostream &os); + void serialize(EventManager *em, std::ostream &os) + {} void unserialize(EventManager *em, Checkpoint *cp, - const std::string §ion); + const std::string §ion) + {} }; |